Design and development of FPGA based adaptive thresholder for image processing applications

Azeema Sultana, M. Meenakshi
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引用次数: 13

Abstract

This paper presents design, implementation and real time validation of Image binarization process using weight based clustering algorithm, which uses the clustering property of neural network. The generic technique for image binarization requires choosing a threshold value and comparing the pixel values with the threshold and classifying as black and white. The proposed algorithm calculates a global optimum threshold by learning from the image background and foreground features. A simple two-weight neural network is implemented to cluster the foreground and background pixels. Here an adaptive thresholding technique based on competitive learning is selected for Weight Updating. The developed algorithm is implemented on a FPGA platform hardware system, which consists of two functional blocks. The first block is used to obtain the threshold value for the image frame; another block to apply the threshold value to the frame. This parallelism and the simple hardware component of both blocks make this approach suitable for real-time applications, while the performance remains comparable with the Otsu technique frequently used in off-line threshold determination. Results from the proposed algorithm are presented for numerous examples, both from simulations and experimentally using the FPGA.
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基于FPGA的图像处理自适应阈值器的设计与开发
本文利用神经网络的聚类特性,设计、实现了基于权重的聚类算法,并对其进行了实时验证。一般的图像二值化技术需要选择一个阈值,并将像素值与阈值进行比较,然后进行黑白分类。该算法通过学习图像的背景和前景特征,计算出全局最优阈值。一个简单的双权重神经网络实现了前景和背景像素的聚类。本文选择一种基于竞争学习的自适应阈值技术进行权重更新。所开发的算法在FPGA平台硬件系统上实现,该系统由两个功能模块组成。所述第一块用于获取所述图像帧的阈值;另一个块用于将阈值应用于帧。这种并行性和两个块的简单硬件组件使这种方法适合于实时应用程序,而性能仍然与离线阈值确定中经常使用的Otsu技术相当。本文给出了基于FPGA的仿真和实验结果。
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