{"title":"A 1V 10b 60MS/s Hybrid Opamp-Reset/Switched-RC pipelined ADC","authors":"J. Carnes, Gil-Cho Ahn, Un-Ku Moon","doi":"10.1109/ASSCC.2007.4425774","DOIUrl":null,"url":null,"abstract":"The fully differential Opamp Reset Switching Technique (ORST) for low voltage applications is presented. The technique is demonstrated in a 1V, 10-bit, 60MS/s pipelined ADC where a hybrid ORST/Switched-RC topology is adopted for improved accuracy at low voltage supplies and achieves 50dB SNDR in 0.18µm CMOS while dissipating 34mW. The architecture also uses a passive input track-and-reset to save power and has an input bandwidth greater than 90MHz.","PeriodicalId":186095,"journal":{"name":"2007 IEEE Asian Solid-State Circuits Conference","volume":"45 14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2007.4425774","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The fully differential Opamp Reset Switching Technique (ORST) for low voltage applications is presented. The technique is demonstrated in a 1V, 10-bit, 60MS/s pipelined ADC where a hybrid ORST/Switched-RC topology is adopted for improved accuracy at low voltage supplies and achieves 50dB SNDR in 0.18µm CMOS while dissipating 34mW. The architecture also uses a passive input track-and-reset to save power and has an input bandwidth greater than 90MHz.
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