{"title":"Payload digital processor hardware demonstrator for satellite communications systems","authors":"C. K. Leong, R. P. Mathur, A. Craig","doi":"10.1109/ICCT.1996.545186","DOIUrl":null,"url":null,"abstract":"Satellite communication payloads for mobile communications systems require advanced digital signal processing and narrowband beamforming techniques to meet the traffic routing flexibility. The paper describes the key functions of a narrowband digital beamforming processor and summarises key aspects of development work performed at Marconi Space to demonstrate the feasibility of such a flight processor. This includes relevant ASIC designs to validate key processing algorithms, multichip modules (MCMs) to demonstrate high density packaging techniques and a flight model demonstrator to demonstrate a representative narrowband processor using the ASICs and MCMs.","PeriodicalId":395678,"journal":{"name":"Proceedings of International Conference on Communication Technology. ICCT '96","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of International Conference on Communication Technology. ICCT '96","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCT.1996.545186","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Satellite communication payloads for mobile communications systems require advanced digital signal processing and narrowband beamforming techniques to meet the traffic routing flexibility. The paper describes the key functions of a narrowband digital beamforming processor and summarises key aspects of development work performed at Marconi Space to demonstrate the feasibility of such a flight processor. This includes relevant ASIC designs to validate key processing algorithms, multichip modules (MCMs) to demonstrate high density packaging techniques and a flight model demonstrator to demonstrate a representative narrowband processor using the ASICs and MCMs.