{"title":"An efficient VFI-based NoC architecture using Johnson-encoded Reconfigurable FIFOs","authors":"A. Rahmani, P. Liljeberg, J. Plosila, H. Tenhunen","doi":"10.1109/NORCHIP.2010.5669474","DOIUrl":null,"url":null,"abstract":"In this paper, a Johnson-encoded Reconfigurable Synchronous/Bi-Synchronous (RSBS) FIFO is proposed which can adapt its operation to either synchronous or bi-synchronous mode. The proposed FIFO which can be used to interface modules in Voltage/Frequency Islands (VFI) based Networks-on-chip, is capable of alleviating the excessive energy consumption and high performance overhead of the conventional bi-synchronous FIFOs. The FIFO is scalable and synthesizable in synchronous standard cells. In addition, a technique for mesochronous adaptation of the proposed FIFO is presented. Our extensive experiments show significant power and performance improvements compared to non-reconfigurable architectures.","PeriodicalId":292342,"journal":{"name":"NORCHIP 2010","volume":"186 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"NORCHIP 2010","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NORCHIP.2010.5669474","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
In this paper, a Johnson-encoded Reconfigurable Synchronous/Bi-Synchronous (RSBS) FIFO is proposed which can adapt its operation to either synchronous or bi-synchronous mode. The proposed FIFO which can be used to interface modules in Voltage/Frequency Islands (VFI) based Networks-on-chip, is capable of alleviating the excessive energy consumption and high performance overhead of the conventional bi-synchronous FIFOs. The FIFO is scalable and synthesizable in synchronous standard cells. In addition, a technique for mesochronous adaptation of the proposed FIFO is presented. Our extensive experiments show significant power and performance improvements compared to non-reconfigurable architectures.