{"title":"Comparisons in performance between the Motorola DSP56000 and the Texas Instruments TMS320C25 for audio band, real-time digital signal processing","authors":"A. Richardson, T. Boswell, T.D. Blake","doi":"10.1109/PACRIM.1991.160747","DOIUrl":null,"url":null,"abstract":"The Motorola DSP56000 and the Texas Instruments TMS320C25 digital signal processors have been used to implement real-time finite-impulse response (FIR) filters. Calculations were made to predict the number of instruction cycles needed to implement the FIR kernels of the assembly language programs, and the complete programs including input/output routines. Calculations based on the manufacturers' published data on instruction execution speeds showed that the FIR kernel of the DSP56000 assembly language program for an n-tap FIR would execute in (n+3) instruction cycles, whereas that of the TMS320C25 would execute in (n+7) instruction cycles. The calculations also predicted that, at a sampling rate of 48 kHz, the DSP56000 and the TMS320C25 would be able to implement up to 194-tap and 192-tap FIR filters, respectively. At 40 kHz sampling rate, a maximum of 234-tap FIR filter was calculated for the TMS320C25, and an experimental value of 227 was realized.<<ETX>>","PeriodicalId":289986,"journal":{"name":"[1991] IEEE Pacific Rim Conference on Communications, Computers and Signal Processing Conference Proceedings","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] IEEE Pacific Rim Conference on Communications, Computers and Signal Processing Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PACRIM.1991.160747","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The Motorola DSP56000 and the Texas Instruments TMS320C25 digital signal processors have been used to implement real-time finite-impulse response (FIR) filters. Calculations were made to predict the number of instruction cycles needed to implement the FIR kernels of the assembly language programs, and the complete programs including input/output routines. Calculations based on the manufacturers' published data on instruction execution speeds showed that the FIR kernel of the DSP56000 assembly language program for an n-tap FIR would execute in (n+3) instruction cycles, whereas that of the TMS320C25 would execute in (n+7) instruction cycles. The calculations also predicted that, at a sampling rate of 48 kHz, the DSP56000 and the TMS320C25 would be able to implement up to 194-tap and 192-tap FIR filters, respectively. At 40 kHz sampling rate, a maximum of 234-tap FIR filter was calculated for the TMS320C25, and an experimental value of 227 was realized.<>