M. Schipani, P. Bruschi, G. C. Tripoli, T. Ungaretti
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引用次数: 5
Abstract
A CMOS interface for three-axis capacitive accelerometers is presented. The circuit implements an innovative readout approach which allows to obtain a power consumption much lower than traditional schemes, thanks also to the reduced circuit complexity. A total power consumption of 175 muW at the nominal supply voltage 2.5 V is obtained for the entire interface.
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