M.Y. Park, J. Kim, D. Lee, J. Park, K. Cho, H. Cho
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引用次数: 5
Abstract
We have developed the gate driver IC with 64-channel outputs and the PWM cathode driver IC with 32-channel outputs for driving row/column line of FED panel. The developed gate and the cathode driver ICs having full-complementary high voltage output circuit and CVSL type level shifter are suited for low power consumption, high speed switching as 20 MHz, high output drive voltages ranging from 20 V to 100 V and 20 mA current driving. The high-voltage output stages perform 100 V switching of 50 pF capacitive load with 100 ns of rising/falling time obtained. The LDMOS technology that is completely compatible with 1.2 /spl mu/m analog CMOS process is used to decrease the production cost and increase the packing density of panel driving system. The gate and cathode driver ICs applied 25/spl times/25 FED panels driving board show excellent driving characteristics.
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