Sang-Won Lee, Y. Song, Soo-Won Kim, H. Oh, Woo-Jang Hahn
{"title":"RAPTOR: a single chip multiprocessor","authors":"Sang-Won Lee, Y. Song, Soo-Won Kim, H. Oh, Woo-Jang Hahn","doi":"10.1109/APASIC.1999.824067","DOIUrl":null,"url":null,"abstract":"A microarchitecture of a processor named RAPTOR is described. RAPTOR is a single chip multiprocessor developed for exploiting thread-level parallelism. RAPTOR includes four identical processors, a graphics coprocessor, and an external cache controller. Each processor has a 16 KB primary cache and implements SPARC version 9 instruction set architecture. The external cache controller provides direct connection to a large external second level cache. RAPTOR is designed as a building block of multiprocessor systems such as symmetric multiprocessor machines.","PeriodicalId":346808,"journal":{"name":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.1999.824067","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
A microarchitecture of a processor named RAPTOR is described. RAPTOR is a single chip multiprocessor developed for exploiting thread-level parallelism. RAPTOR includes four identical processors, a graphics coprocessor, and an external cache controller. Each processor has a 16 KB primary cache and implements SPARC version 9 instruction set architecture. The external cache controller provides direct connection to a large external second level cache. RAPTOR is designed as a building block of multiprocessor systems such as symmetric multiprocessor machines.
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