H. Jeong, W.S. Yang, Y. Hwang, C. Cho, S. Park, S. Ahn, Y. Chun, S. shin, S.H. Song, J.Y. Lee, S. Jang, C.H. Lee, J. Jeong, M. Cho, J.K. Lee, Kinam Kim
{"title":"Highly manufacturable 4 Gb DRAM using using 0.11 /spl mu/m DRAM technology","authors":"H. Jeong, W.S. Yang, Y. Hwang, C. Cho, S. Park, S. Ahn, Y. Chun, S. shin, S.H. Song, J.Y. Lee, S. Jang, C.H. Lee, J. Jeong, M. Cho, J.K. Lee, Kinam Kim","doi":"10.1109/IEDM.2000.904328","DOIUrl":null,"url":null,"abstract":"4 Gb DRAM has been developed successfully using 0.11 /spl mu/m DRAM technology. Considering manufacturability, we have focused on developing patterning technology that makes 0.11 /spl mu/m design rules possible using KrF lithography. Also, novel DRAM technologies, which have a big influence on the future DRAM integration, are developed as follows:, using novel oxide (SOG) for the enhanced capability of gap-filling, borderless metal contact and stud processes, line-type storage node SAC, thin gate oxide, and CVD Al process for metal interconnections.","PeriodicalId":276800,"journal":{"name":"International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2000.904328","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
4 Gb DRAM has been developed successfully using 0.11 /spl mu/m DRAM technology. Considering manufacturability, we have focused on developing patterning technology that makes 0.11 /spl mu/m design rules possible using KrF lithography. Also, novel DRAM technologies, which have a big influence on the future DRAM integration, are developed as follows:, using novel oxide (SOG) for the enhanced capability of gap-filling, borderless metal contact and stud processes, line-type storage node SAC, thin gate oxide, and CVD Al process for metal interconnections.
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