Fault-tolerant routing method of NoC system based on clustering

Abstract

Along with the development of semiconductor's channel length that narrows toward the deep submicron and even nanometer, the design of SoC has become increasingly complex. Therefore, how to achieve fault tolerance, aiming to avoid the impact process issues and improve reliability of system, has become the focus of the NoC design. This paper presents a fault tolerance routing method on NoC system that can perfectly solve the problems above. Targeted low latency, this method based on the existing deterministic algorithms as well as adaptive algorithms and introduces a router clustering technology which supports task based mapping and feedback. The NIRGAM simulator is utilized to achieve performance evaluation. Experiments show that the proposed method has already achieved the goal that applications keep running on the system without the effect of unexpected faults in the NoC. Besides, the performance of system does not decrease dramatically with the number of faults increasing on the chip.