Substrate Noise Rejection in a New Mixed-Signal Integration Technology

Abstract

In this paper, a new mixed-signal substrate noise rejection technique is proposed and implemented using a recently-developed self-aligned wafer-level integration technology (SAWLIT). In this technique, chips with any thickness can be used. Using sidewall metallization of cavities in an interposer substrate, truly grounded Faraday-cage structures are realized. The simulation and measurement results show that a high-resistivity silicon substrate can suppress the substrate noise by more than 60dB for the frequency of less than 1 GHz. For the frequency range of 1GHz to 25GHz, using the grounded Faraday-cage, the isolation can be improved to less than -60dB. For the low-resistivity silicon substrate, the substrate coupling is worse than the high-resistivity Si, however, using sidewall metallization, the isolation can be improved to below -60dB. To our knowledge, these are the best values reported for isolation improvement of thick silicon substrates and chips using a very thin layer of metallization.