A Detailed Vth-Variation Analysis for Sub-100-nm Embedded SRAM Design

2006 IEEE International SOC Conference Pub Date : 2006-09-01 DOI:10.1109/SOCC.2006.283905

M. Yamaoka, H. Onodera

引用次数: 8

Abstract

A Vth variation has large impact on SRAM operation. To predict an SRAM operating margin in design phase, a Vth window analysis is used. We propose an improved Vth window analysis, which considers a relationship between global and local Vth variation, and the analysis enables accurate operating margin prediction. This analysis predicts 7.7% larger yield deterioration than conventional method in 65-nm manufacturing process and gives a chance to introduce some operating margin enhancement circuits in design phase.

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亚100纳米嵌入式SRAM设计的vth变化分析

Vth变化对SRAM的运行有很大的影响。为了在设计阶段预测SRAM的工作余量，使用了第v窗口分析。我们提出了一种改进的Vth窗口分析，该分析考虑了全局和局部Vth变化之间的关系，并且该分析能够准确预测营业利润率。该分析预测，在65纳米制造工艺中，良率下降幅度将比传统方法大7.7%，并为在设计阶段引入一些运营边际增强电路提供了机会。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2006 IEEE International SOC Conference

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