Design of low voltage flip-flop based on complementary pass-transistor adiabatic logic circuit

Abstract

This paper presents To design a low voltage flip-flops based on CPAL circuit. The Complementary Pass-Transistor Adiabatic Logic is used to release flip-flops circuits with DTCMOS (Dual Threshold CMOS) techniques. All circuits are simulated using 180nm Tanner model technology by varying supply voltages. Based on the simulation results, the flip-flop working along with the power-gating technique is realized by CPAL which work on low voltage medium which help to increase speed of the execution. We use Ac power supply which work as low power characteristics of complementary pass-transistor logic (CPL) circuit. Power-clock scheme is more suitable for the design of flip-flops using two phase sequential circuits because it helps to decrease more transistors. The Adiabatic flip-flop has large energy saving over wide range of frequencies.