Parallel multimedia processor using customised Infineon TriCores

Abstract

This paper reports on our experiments on using the Infineon TriCore as a building block for a multimedia processor. The experiments aim to obtain a high performance processor using two strategies: integrating multimedia units into the TriCore CPU and constructing the TriCore in multiprocessor configuration. The design and implementation of the multimedia units for video, audio, and text compressions are discussed. Two hardware architectures for IMA ADPCM audio compression multimedia unit were designed: direct architecture and sequential architecture. The multimedia unit for text compression is based on a modification from another design; our design uses a more efficient timing operation and has a better hardware utilization than the original design. Two algorithms for parallel motion-estimation were implemented on the multiple TriCore system. The results show that the TriCore is a good building block for a multiprocessor system.