F. Pescador, M. Garrido, C. Sanz, E. J. Martínez, Manuel César Rodríguez Lacruz, D. S. Martínez
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引用次数: 7
Abstract
In this paper, the implementation of a baseline profile H.264 decoder based on a DM 642 digital signal processor is described. An initial standard compliant raw-C decoder has been optimized in speed for the target processor. The parallelism between algorithm execution and data movement has been fully exploited using DMA. Also, critical parts of the algorithm have been encoded directly in assembly code to increase the number of instructions per cycle. The decoder has been tested in simulation with actual (transcoded) DVD and digital TV streams. According to these tests, standard definition real time decoding can be obtained with a DM 642@600 MHz.
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