A high performance general purpose processing element for avionic applications

M. S. Russell, J. C. Hansen, L.J. Merboth
{"title":"A high performance general purpose processing element for avionic applications","authors":"M. S. Russell, J. C. Hansen, L.J. Merboth","doi":"10.1109/NAECON.1991.165738","DOIUrl":null,"url":null,"abstract":"The Unisys/AT&T General Purpose Processing Element (GPPE) module is described. The GPPE, which is based upon next-generation reduced instruction set computer (RISC) microprocessor technology, combines the 32-b instruction set architecture (ISA) and 33-MHz operation. Using a commercial ISA and open architecture results in the most cost-effective, full-featured, militarized design available on a single-width SEM-E module. Other GPPE features include a multilayer data security mechanism and extensive features to protect classified data. The 6 Mbytes of SRAM and 512 kbytes of EEPROM available on the GPPE are consistent with large RISC addressing spaces and real-time operating system requirements. Support of the Joint Integrated Avionics Working Group two-level maintenance concepts is provided.<<ETX>>","PeriodicalId":247766,"journal":{"name":"Proceedings of the IEEE 1991 National Aerospace and Electronics Conference NAECON 1991","volume":"140 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 1991 National Aerospace and Electronics Conference NAECON 1991","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.1991.165738","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

The Unisys/AT&T General Purpose Processing Element (GPPE) module is described. The GPPE, which is based upon next-generation reduced instruction set computer (RISC) microprocessor technology, combines the 32-b instruction set architecture (ISA) and 33-MHz operation. Using a commercial ISA and open architecture results in the most cost-effective, full-featured, militarized design available on a single-width SEM-E module. Other GPPE features include a multilayer data security mechanism and extensive features to protect classified data. The 6 Mbytes of SRAM and 512 kbytes of EEPROM available on the GPPE are consistent with large RISC addressing spaces and real-time operating system requirements. Support of the Joint Integrated Avionics Working Group two-level maintenance concepts is provided.<>
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一种用于航空电子应用的高性能通用处理元件
介绍了Unisys/AT&T通用处理元件(GPPE)模块。GPPE基于下一代精简指令集计算机(RISC)微处理器技术,结合了32b指令集架构(ISA)和33mhz操作。使用商业ISA和开放架构可以在单宽度SEM-E模块上实现最具成本效益、功能齐全、军事化的设计。GPPE的其他特性包括多层数据安全机制和保护机密数据的广泛特性。GPPE上可用的6mb SRAM和512kb EEPROM符合大型RISC寻址空间和实时操作系统要求。提供联合综合航空电子工作组两级维护概念的支持。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
270-VDC/hybrid 115-VAC electric power generating system technology demonstrator An arc projection algorithm applied to near-field radar imaging Aircraft route optimization using adaptive simulated annealing R&M 2000 Workstation Exploration of the attractor space of small networks of reciprocally connected processing elements
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1