Jeyavijayan Rajendran, Huan Zhang, O. Sinanoglu, R. Karri
{"title":"High-level synthesis for security and trust","authors":"Jeyavijayan Rajendran, Huan Zhang, O. Sinanoglu, R. Karri","doi":"10.1109/IOLTS.2013.6604087","DOIUrl":null,"url":null,"abstract":"Trustworthiness of System-on-Chips (SoCs) is undermined by malicious logic (trojans) in third party intellectual properties (3PIPs). Concurrent Error Detection (CED) techniques can be adapted to detect malicious outputs generated by trojans. Further, by using a diverse set of 3PIP vendors and operation-to-3PIP-to-vendor allocation constraints, one can prevent collusions between 3PIPs from the same vendor. These security constraints to detect malicious outputs and to prevent collusion have been incorporated into the allocation step of high-level synthesis.","PeriodicalId":423175,"journal":{"name":"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"40","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IOLTS.2013.6604087","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 40
Abstract
Trustworthiness of System-on-Chips (SoCs) is undermined by malicious logic (trojans) in third party intellectual properties (3PIPs). Concurrent Error Detection (CED) techniques can be adapted to detect malicious outputs generated by trojans. Further, by using a diverse set of 3PIP vendors and operation-to-3PIP-to-vendor allocation constraints, one can prevent collusions between 3PIPs from the same vendor. These security constraints to detect malicious outputs and to prevent collusion have been incorporated into the allocation step of high-level synthesis.