Y. Adelman, D. Agur, T. Ben-Nun, O. Chalak, Z. Greenfield, R. Holzer, M. Jalfon, A. Kadry, E. Kraus, F. Lange, H. Meirov, A. Olofsson, O. Raikhman, D. Treves, S. Zur, R. Talmudi
{"title":"A 600 MHz DSP with 24 Mb embedded DRAM with an enhanced instruction set for wireless communication","authors":"Y. Adelman, D. Agur, T. Ben-Nun, O. Chalak, Z. Greenfield, R. Holzer, M. Jalfon, A. Kadry, E. Kraus, F. Lange, H. Meirov, A. Olofsson, O. Raikhman, D. Treves, S. Zur, R. Talmudi","doi":"10.1109/ISSCC.2004.1332772","DOIUrl":null,"url":null,"abstract":"A 600 MHz general-purpose DSP with 24 Mb of embedded DRAM, 154 GOPS, 4800 MMACS, and 40 Gb/s I/O throughput is presented. The chip contains over 60M transistors and is implemented in 0.13 /spl mu/m 8M CMOS technology.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2004.1332772","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A 600 MHz general-purpose DSP with 24 Mb of embedded DRAM, 154 GOPS, 4800 MMACS, and 40 Gb/s I/O throughput is presented. The chip contains over 60M transistors and is implemented in 0.13 /spl mu/m 8M CMOS technology.