Improved etched multistep JTE for UHV SiC power devices

Abstract

A novel edge termination, referred to as etched 3-step junction termination extension with 4-space-modulated buffer trench regions (3S-4SMBT-JTE), is presented for ultrahigh voltage silicon carbide (SiC) power devices. In comparison with the traditional 3S-JTE, the 3S-4SMBT-JTE shows greatly reduced peak electric field (EF) around the corners and edges of the device, resulting in a superior breakdown voltage (BV) performance with wide tolerance to etching depth. According to 2-D device simulations based on the 4H-SiC NPN structure with a 90 μm thick drift layer, an optimized 3S-4SMBT-JTE shows that over 14 kV BV is achievable with a wide etching depth window of 1.0 μm, 67% wider than that of 3S-JTE.