Dynamic Compilation Framework with DVS for Reducing Energy Consumption in Embedded Processors

Abstract

Dynamic voltage scaling (DVS) is an effective technique for reducing the energy consumption in embedded systems. There are several advantages using DVS technique into compiler framework. This paper present a framework for reducing energy consumption in embedded processors using the dynamic compiler collaborate with DVS technique. Two algorithms are implemented in this framework, and the framework is implemented using the Intel PIN systems and is deployed in a real hardware platform. Experimental results based on the software and hardware platform, show that significant energy saving are achieved while performance loss less than 5%.