{"title":"Uncovering the latent defects in dimming control devices by introducing application specific stress profile in HALT — A case study","authors":"Vikas Pandey, Utpal Rabha, Gayatri Pandit, Swapnil Sabde","doi":"10.1109/ICRITO.2017.8342415","DOIUrl":null,"url":null,"abstract":"In present competitive market place, industries are more focused around the standard test practices & procedures which help in identification of the weak links in the design & help improve robustness of the products. In the similar context most of the electronics product industries have adopted HALT (Highly Accelerated Life Testing) as a standard test practices to uncover the weak links & latent defects in the electronics board against temperature, vibration & the combined (temperature & vibration) stresses. The HALT guidelines accepted by most of the industries emphasizes on only the temperature and vibration step stress test profiles which may not relate to the ASSP (Application Specific Stress Profile) of all the products. This research help in inclusion of ASSP in conventional HALT which helps conduct HALT in more effective way. In this paper, a case study on DCD (Dimming Control Device) has been presented to showcase how an addition of ASSP to conventional HALT step stress test profile has strengthened the design by uncovering the latent defects.","PeriodicalId":357118,"journal":{"name":"2017 6th International Conference on Reliability, Infocom Technologies and Optimization (Trends and Future Directions) (ICRITO)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 6th International Conference on Reliability, Infocom Technologies and Optimization (Trends and Future Directions) (ICRITO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICRITO.2017.8342415","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In present competitive market place, industries are more focused around the standard test practices & procedures which help in identification of the weak links in the design & help improve robustness of the products. In the similar context most of the electronics product industries have adopted HALT (Highly Accelerated Life Testing) as a standard test practices to uncover the weak links & latent defects in the electronics board against temperature, vibration & the combined (temperature & vibration) stresses. The HALT guidelines accepted by most of the industries emphasizes on only the temperature and vibration step stress test profiles which may not relate to the ASSP (Application Specific Stress Profile) of all the products. This research help in inclusion of ASSP in conventional HALT which helps conduct HALT in more effective way. In this paper, a case study on DCD (Dimming Control Device) has been presented to showcase how an addition of ASSP to conventional HALT step stress test profile has strengthened the design by uncovering the latent defects.