Signal integrity characterization and modelling of a PCI/PCI-x 66/133 MHz bus

M. Sharawi
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引用次数: 2

Abstract

Design and characterization of high speed digital buses and interconnects is an essential part in the computer hardware development process. Signal Integrity (SI) testing and verification examines the signal levels, shapes and timing requirements against specifications. In this work, we present a full SI characterization and modelling of a peripheral component interconnect (PCI) bus as well as a PCI-extended (PCI-x) bus running at 66 MHz/133 MHz, respectively. Laboratory measurements show the compliance with specification timing and signal levels.
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PCI/PCI-x 66/133 MHz总线的信号完整性表征和建模
高速数字总线和互连电路的设计和特性是计算机硬件开发过程中必不可少的一部分。信号完整性(SI)测试和验证根据规范检查信号电平,形状和时序要求。在这项工作中,我们提出了外围组件互连(PCI)总线以及运行在66 MHz/133 MHz的PCI扩展(PCI-x)总线的完整SI表征和建模。实验室测量显示符合规格定时和信号电平。
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