Fast Polar Decoder Implementation using Special Nodes

Abstract

The information sent by the transmitter to the receiver through the channel may be user information or control information. For error-free communication, errorcorrecting codes are needed to detect and correct errors. ECCs like low-density parity check (LDPC) and polar code are selected for channel data and channel control coding, respectively, for 5G wireless communication. Compared to LDPC and turbo codes, Polar code has the ability to use all channel capacity. The Successive Cancellation decoder is a basic polar decoder, which has longer latency due to its sequential nature. A polar decoder with special nodes is proposed in this paper. This fast polar decoder makes the decoding operation faster. The polar decoder is designed using special nodes–Rate-zero, Rate-one, Single Parity Check, and Repetition nodes. These special nodes are generated from the proposed node generator circuit. VLSI architectures of special nodes and fast polar decoder are generated by the Xilinx platform, which is shown in this paper