Design of a 2.4-GHz differential low noise amplifier using 180nm technology

Nandini Shrivastava, R. Khatri
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引用次数: 5

Abstract

A differential input differential output low noise amplifier is proposed here. The designing is done using UMC 180nm CMOS RF process. The low noise amplifier (LNA) circuit operates at 2.4-GHz frequency. This paper presents the LNA with inductive degenerated topology using cascoded CMOS architecture in order to provide the improved gain, linearity and better isolation. It provides a better stability. The simulation and analysis is performed using Cadence Virtuoso IC tool. This design exhibits a gain of 12.68 dB, input return loss (S11) of −13.5 dB, reverse isolation (S12) of −33.85 dB and S22 equals to −10 dB. It produces a Noise Figure of 3.14 dB. The circuit operates at supply voltage of 1.8V.
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采用180nm技术设计2.4 ghz差分低噪声放大器
提出了一种差分输入差分输出低噪声放大器。设计采用UMC 180nm CMOS射频工艺。低噪声放大器(LNA)电路工作在2.4 ghz频率。为了提高增益、线性度和隔离度,本文提出了一种采用级联CMOS结构的电感退化拓扑LNA。它提供了更好的稳定性。利用Cadence Virtuoso集成电路工具进行仿真分析。该设计的增益为12.68 dB,输入回波损耗(S11)为- 13.5 dB,反向隔离(S12)为- 33.85 dB, S22为- 10 dB。它产生的噪声系数为3.14 dB。该电路在1.8V的电源电压下工作。
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