{"title":"Microfabricated thin silicon vapor chamber for low profile thermal management","authors":"Jiaxing Liang, M. Bakir, Y. Joshi","doi":"10.1109/ITHERM.2017.7992519","DOIUrl":null,"url":null,"abstract":"This paper presents thermal performance characterization of ultra-thin silicon vapor chambers suitable for integration into packages, including possibly interposers. 720±10 pm thick silicon vapor chambers at three different wick porosities have been fabricated using photolithography and deep reactive ion etching (DRIE) to create chambers, followed by inkjet printing and self-assembly to create patterned bi-porous monolayer copper powder wick structures within the chambers, and finally completed by the use of a low outgassing epoxy to bond the vapor chambers. Vapor chambers were attached with copper tubing using epoxy and were evacuated to 1.2 Pa, prior to charging with de-ionized water. A resistance heater provided heat to the evaporator, and a pin fin heat sink rejected heat to the ambient from the peripheral extension of the vapor chamber. The effect of wick porosity and wick saturation ratio on the performance and reliability of the vapor chambers were studied. Experimental results showed that at a porosity of 0.767, with wick saturation ratio of approximately 50%, the thermal resistance with air cooling was 2.5 K/W, at a heat flux of 7.6 W/cm2. The lowest thermal resistance of a charged sample was 38% of an uncharged sample's, and was 74% of a 750±25 pm solid silicon substrate's thermal resistance. Testing for 120 hrs showed no significant degradation of the performance of the vapor chambers.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITHERM.2017.7992519","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
This paper presents thermal performance characterization of ultra-thin silicon vapor chambers suitable for integration into packages, including possibly interposers. 720±10 pm thick silicon vapor chambers at three different wick porosities have been fabricated using photolithography and deep reactive ion etching (DRIE) to create chambers, followed by inkjet printing and self-assembly to create patterned bi-porous monolayer copper powder wick structures within the chambers, and finally completed by the use of a low outgassing epoxy to bond the vapor chambers. Vapor chambers were attached with copper tubing using epoxy and were evacuated to 1.2 Pa, prior to charging with de-ionized water. A resistance heater provided heat to the evaporator, and a pin fin heat sink rejected heat to the ambient from the peripheral extension of the vapor chamber. The effect of wick porosity and wick saturation ratio on the performance and reliability of the vapor chambers were studied. Experimental results showed that at a porosity of 0.767, with wick saturation ratio of approximately 50%, the thermal resistance with air cooling was 2.5 K/W, at a heat flux of 7.6 W/cm2. The lowest thermal resistance of a charged sample was 38% of an uncharged sample's, and was 74% of a 750±25 pm solid silicon substrate's thermal resistance. Testing for 120 hrs showed no significant degradation of the performance of the vapor chambers.