Pub Date : 2017-08-03DOI: 10.1109/ITHERM.2017.7992501
D. DeVoto, J. Major, P. Paret, G. Blackman, A. Wong, J. Meth
Thermal interface materials (TIMs) are used in power electronics packaging to minimize thermal resistance between the heat generating component and the heat sink. Thermal greases are one such class of TIMs. The conformability and thin bond line thickness (BLT) of these TIMs can potentially provide low thermal resistance throughout the operation lifetime of a component. However, their performance degrades over time due to pump-out and dry-out during thermal and power cycling. The reliability performance of greases through operational cycling needs to be quantified to develop new materials with superior properties. NREL, in collaboration with DuPont, has performed thermal and reliability characterization of several commercially-available thermal greases. Initial bulk and contact thermal resistance of grease samples were measured, and then the thermal degradation that occurred due to pump-out and dry-out during temperature cycling was monitored. The thermal resistances of five different grease materials were evaluated using NREL's steady-state thermal resistance tester based on the ASTM test method D5470. Greases were then applied, utilizing a 2.5 cm × 2.5 cm stencil, between invar and aluminum plates to compare the thermomechanical performance of the materials in a representative test fixture. Scanning Acoustic microscopy, thermal, and compositional analyses were performed periodically during thermal cycling from −40°C to 125°C. Completion of this characterization has allowed for a comprehensive evaluation of thermal greases both for their initial bulk and contact thermal performance, as well as their degradation mechanisms under accelerated thermal cycling conditions.
热界面材料(TIMs)用于电力电子封装，以尽量减少发热组件和散热器之间的热阻。热润滑脂就是这样一类润滑脂。这些TIMs的一致性和薄粘合线厚度(BLT)可以在组件的整个使用寿命期间提供低热阻。然而，由于热循环和动力循环期间的泵出和干出，它们的性能会随着时间的推移而下降。润滑脂通过运行循环的可靠性性能需要量化，以开发性能优越的新材料。NREL与杜邦公司合作，对几种商用热润滑脂进行了热学和可靠性表征。测量了润滑脂样品的初始体积和接触热阻，然后监测了温度循环过程中由于泵出和干燥而发生的热降解。采用基于ASTM测试方法D5470的NREL稳态热阻测试仪对五种不同润滑脂材料的热阻进行了评估。然后使用2.5 cm × 2.5 cm的模板，在invar和铝板之间涂抹润滑脂，以比较代表性测试夹具中材料的热机械性能。在- 40°C至125°C的热循环期间，定期进行扫描声学显微镜、热分析和成分分析。该表征的完成可以全面评估热润滑脂的初始体积和接触热性能，以及它们在加速热循环条件下的降解机制。
{"title":"Degradation characterization of thermal interface greases","authors":"D. DeVoto, J. Major, P. Paret, G. Blackman, A. Wong, J. Meth","doi":"10.1109/ITHERM.2017.7992501","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992501","url":null,"abstract":"Thermal interface materials (TIMs) are used in power electronics packaging to minimize thermal resistance between the heat generating component and the heat sink. Thermal greases are one such class of TIMs. The conformability and thin bond line thickness (BLT) of these TIMs can potentially provide low thermal resistance throughout the operation lifetime of a component. However, their performance degrades over time due to pump-out and dry-out during thermal and power cycling. The reliability performance of greases through operational cycling needs to be quantified to develop new materials with superior properties. NREL, in collaboration with DuPont, has performed thermal and reliability characterization of several commercially-available thermal greases. Initial bulk and contact thermal resistance of grease samples were measured, and then the thermal degradation that occurred due to pump-out and dry-out during temperature cycling was monitored. The thermal resistances of five different grease materials were evaluated using NREL's steady-state thermal resistance tester based on the ASTM test method D5470. Greases were then applied, utilizing a 2.5 cm × 2.5 cm stencil, between invar and aluminum plates to compare the thermomechanical performance of the materials in a representative test fixture. Scanning Acoustic microscopy, thermal, and compositional analyses were performed periodically during thermal cycling from −40°C to 125°C. Completion of this characterization has allowed for a comprehensive evaluation of thermal greases both for their initial bulk and contact thermal performance, as well as their degradation mechanisms under accelerated thermal cycling conditions.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129935015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-31DOI: 10.1109/ITHERM.2017.7992513
F. Robinson, A. Bar-Cohen
Increasing integration density of electronic components has exacerbated the thermal management challenges facing electronic system developers. The high power, heat flux, and volumetric heat generation of emerging devices are driving the transition from remote cooling, which relies on conduction and spreading, to embedded cooling, which facilitates direct contact between the heat-generating device and coolant flow. Microgap coolers employ the forced flow of dielectric fluids undergoing phase change in a heated channel between devices. While two-phase microcoolers are used routinely in ground-based systems, the lack of acceptable models and correlations for microgravity operation has limited their use for spacecraft thermal management. Previous research has revealed that gravitational acceleration plays a diminishing role as the channel diameter shrinks, but there is considerable variation among the proposed gravity-insensitive channel dimensions and minimal research on rectangular ducts. Reliable criteria for achieving gravity-insensitive flow boiling performance would enable spaceflight systems to exploit this powerful thermal management technique and reduce development time and costs through reliance on ground-based testing. In the present effort, the authors have studied the effect of evaporator orientation on flow boiling performance of HFE7100 in a 218 pm tall by 13.0 mm wide microgap cooler. Similar heat transfer coefficients and critical heat flux were achieved across five evaporator orientations, indicating that the effect of gravity was negligible.
{"title":"Gravity effects in microgap flow boiling","authors":"F. Robinson, A. Bar-Cohen","doi":"10.1109/ITHERM.2017.7992513","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992513","url":null,"abstract":"Increasing integration density of electronic components has exacerbated the thermal management challenges facing electronic system developers. The high power, heat flux, and volumetric heat generation of emerging devices are driving the transition from remote cooling, which relies on conduction and spreading, to embedded cooling, which facilitates direct contact between the heat-generating device and coolant flow. Microgap coolers employ the forced flow of dielectric fluids undergoing phase change in a heated channel between devices. While two-phase microcoolers are used routinely in ground-based systems, the lack of acceptable models and correlations for microgravity operation has limited their use for spacecraft thermal management. Previous research has revealed that gravitational acceleration plays a diminishing role as the channel diameter shrinks, but there is considerable variation among the proposed gravity-insensitive channel dimensions and minimal research on rectangular ducts. Reliable criteria for achieving gravity-insensitive flow boiling performance would enable spaceflight systems to exploit this powerful thermal management technique and reduce development time and costs through reliance on ground-based testing. In the present effort, the authors have studied the effect of evaporator orientation on flow boiling performance of HFE7100 in a 218 pm tall by 13.0 mm wide microgap cooler. Similar heat transfer coefficients and critical heat flux were achieved across five evaporator orientations, indicating that the effect of gravity was negligible.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"284 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122969312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-30DOI: 10.1109/ITHERM.2017.7992603
N. Pinjari, B. Kumar, A. Bhargav, P. Ruch
Redox flow batteries have seen interest in electronic applications because of their potential to simultaneously deliver electric power and remove heat. For these applications, the flow battery has to be constructed on a side of a computer chip, with components such as flow channels, manifolds, supply tubes, electrodes, membranes and current collectors. Since experimentation with micro-scale components is especially expensive and time-consuming, there is a need to develop computational tools to understand trade-offs in the design and operation of these flow batteries. Computational fluid dynamics study of redox flow batteries is carried out using commercial software package COMSOL Multiphysics. This paper analyses the effect of flow rate and electrode thickness on current and voltage distribution in the flow battery. Tradeoff between flow rate and pressure drop also has been analyzed. We have quantified the effects of flow rate on pressure drop and thereby the parasitic pumping power and the effect of electrode thickness on the ohmic overpotential and thereby the performance of the cell.
{"title":"Effect of electrode properties on performance of miniaturized vanadium redox flow battery","authors":"N. Pinjari, B. Kumar, A. Bhargav, P. Ruch","doi":"10.1109/ITHERM.2017.7992603","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992603","url":null,"abstract":"Redox flow batteries have seen interest in electronic applications because of their potential to simultaneously deliver electric power and remove heat. For these applications, the flow battery has to be constructed on a side of a computer chip, with components such as flow channels, manifolds, supply tubes, electrodes, membranes and current collectors. Since experimentation with micro-scale components is especially expensive and time-consuming, there is a need to develop computational tools to understand trade-offs in the design and operation of these flow batteries. Computational fluid dynamics study of redox flow batteries is carried out using commercial software package COMSOL Multiphysics. This paper analyses the effect of flow rate and electrode thickness on current and voltage distribution in the flow battery. Tradeoff between flow rate and pressure drop also has been analyzed. We have quantified the effects of flow rate on pressure drop and thereby the parasitic pumping power and the effect of electrode thickness on the ohmic overpotential and thereby the performance of the cell.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124630671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/ITHERM.2017.7992537
Tianyi Gao, Shuai Shao, Yan Cui, Bryan Espíritu, Charles Ingalz, Hu Tang, A. Heydari
Liquid cooling provides a feasible thermal management solution in the case of high power density cooling, in addition, it offers several advantages for improving data center energy efficiency. For example, liquid cooling solution may eliminate the utilization of conventional chiller in a data center cooling infrastructure. Since a large portion of heat can be extracted directly to the liquid, the requirement of cooling airflow can is significantly decreased, especially in the cases of cooling high power density racks. A great amount of energy saving maybe achieved since chiller compressor and CRAH/CRAC consumes huge amount of electricity. With proper design and deployment, the direct liquid cooling solution may be a cost-effective alternative to many existing data center cooling technologies under some circumstances. This work focus on the direct liquid cooling technology using cold plates in the cases of cooling high density processor chips and GPU accelerators. The current paper summaries two parts of work: an experimental testing work and a CFD modeling study. In the modeling study, different methodologies using a commercial available CFD package are developed. Several compact liquid cooling cold plate models are developed and validated against experimental data. The results show good agreement. In the experimental work, a single phase pumped liquid system test setup is developed in the lab, and it is used for liquid cooling tests. The test setup enables to adjust the fluid supply temperature and fluid mass flow rate to the designed test conditions. An electrical heater is used in the system to generate high fluid supply temperatures to the cold plate, such as 45°C or even higher. In the current work, a thermal mock-up chip and an actual GPU accelerator are used for characterizing the cold plate liquid cooling performance.
{"title":"A study of direct liquid cooling for high-density chips and accelerators","authors":"Tianyi Gao, Shuai Shao, Yan Cui, Bryan Espíritu, Charles Ingalz, Hu Tang, A. Heydari","doi":"10.1109/ITHERM.2017.7992537","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992537","url":null,"abstract":"Liquid cooling provides a feasible thermal management solution in the case of high power density cooling, in addition, it offers several advantages for improving data center energy efficiency. For example, liquid cooling solution may eliminate the utilization of conventional chiller in a data center cooling infrastructure. Since a large portion of heat can be extracted directly to the liquid, the requirement of cooling airflow can is significantly decreased, especially in the cases of cooling high power density racks. A great amount of energy saving maybe achieved since chiller compressor and CRAH/CRAC consumes huge amount of electricity. With proper design and deployment, the direct liquid cooling solution may be a cost-effective alternative to many existing data center cooling technologies under some circumstances. This work focus on the direct liquid cooling technology using cold plates in the cases of cooling high density processor chips and GPU accelerators. The current paper summaries two parts of work: an experimental testing work and a CFD modeling study. In the modeling study, different methodologies using a commercial available CFD package are developed. Several compact liquid cooling cold plate models are developed and validated against experimental data. The results show good agreement. In the experimental work, a single phase pumped liquid system test setup is developed in the lab, and it is used for liquid cooling tests. The test setup enables to adjust the fluid supply temperature and fluid mass flow rate to the designed test conditions. An electrical heater is used in the system to generate high fluid supply temperatures to the cold plate, such as 45°C or even higher. In the current work, a thermal mock-up chip and an actual GPU accelerator are used for characterizing the cold plate liquid cooling performance.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125169457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/ITHERM.2017.7992596
Bin Xie, Yanhua Cheng, J. Hao, Xingjian Yu, Qi Chen, Run Hu, Kai Wang, Xiaobing Luo
This study quantitatively analyzed the optical and thermal performances of remote quantum dots (QDs)-based white light-emitting diodes (QDs-WLEDs) with the same spectra power distribution (SPD) but reverse packaging structures. The output optical power and PL spectra were measured and analyzed by an integrating sphere system, and the temperature fields were simulated by combing optical measurement with thermal simulation, finally the temperature fields were validated by infrared thermal imager. It was found that when achieved identical SPD, the QDs-on-phosphor type achieved LE of 112.2 lm/W, while the phosphor-on-QDs type demonstrated lower LE of 101.4 lm/W. Moreover, the QDs-on-phosphor type generated less heat than that of another, consequently the highest temperature in the QDs-on-phosphor type was lower than another, and the temperature difference can reach 11.2°C at driving current of 160 mA. Therefore, the QDs-on-phosphor type is an optimal packaging architecture for higher optical efficiency and lower device temperature.
{"title":"Thermal analysis of white light-emitting diodes structures with hybrid quantum dots/phosphor layer","authors":"Bin Xie, Yanhua Cheng, J. Hao, Xingjian Yu, Qi Chen, Run Hu, Kai Wang, Xiaobing Luo","doi":"10.1109/ITHERM.2017.7992596","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992596","url":null,"abstract":"This study quantitatively analyzed the optical and thermal performances of remote quantum dots (QDs)-based white light-emitting diodes (QDs-WLEDs) with the same spectra power distribution (SPD) but reverse packaging structures. The output optical power and PL spectra were measured and analyzed by an integrating sphere system, and the temperature fields were simulated by combing optical measurement with thermal simulation, finally the temperature fields were validated by infrared thermal imager. It was found that when achieved identical SPD, the QDs-on-phosphor type achieved LE of 112.2 lm/W, while the phosphor-on-QDs type demonstrated lower LE of 101.4 lm/W. Moreover, the QDs-on-phosphor type generated less heat than that of another, consequently the highest temperature in the QDs-on-phosphor type was lower than another, and the temperature difference can reach 11.2°C at driving current of 160 mA. Therefore, the QDs-on-phosphor type is an optimal packaging architecture for higher optical efficiency and lower device temperature.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125488697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/ITHERM.2017.7992612
Abel Misrak, Avinash Anaskure, A. Sakib, Unique Rahangdale, A. Lohia, D. Agonafer
The assessment of board level solder joint reliability during thermal cycling is very important for electronic packages. During thermal cycling, the mismatch in Coefficient of Thermal Expansion (CTE) between the materials used in the package induces stress on the solder interconnects and results in deformation and stresses. Finite element tools are widely used for rapid design optimization and also for understanding board level reliability issues. Lumped board modeling approach, explicit geometry approach, and ECAD approach are the three widely used approaches for creating models for Printed Circuit Boards (PCBs). Mapping the metal fraction in each layer from ECAD data usually results in highly accurate and fast solutions. However, in situations where the ECAD data is not available the lump approach is employed as explicit geometry approach requires very large mesh size and very long solution times. In the lump approach, orthotropic elastic material properties are assigned to PCBs. However, for temperatures near and beyond the glass transition temperature, materials behave in a viscoelastic manner. In which case, considering viscoelastic properties would result in a more accurate representation than the orthotropic elastic lump model. In this paper, we present a comparative study on the orthotropic linear elastic and viscoelastic modeling of PCBs and how it affects the board level reliability of Wafer Chip Scale Package (WCSP) under thermal cycling. The viscoelastic material properties of PCBs are characterized using Dynamic Mechanical Analyzer (DMA). The frequency and temperature dependent complex moduli are obtained from the DMA. The obtained results are used to model the PCBs as viscoelastic materials on ANSYS 17.2. Thermal cycling is performed in ANSYS and the results obtained are compared to those obtained from the elastic modeling of PCBs.
{"title":"Comparison of the effect of elastic and viscoelastic modeling of PCBs on the assessment of board level reliability","authors":"Abel Misrak, Avinash Anaskure, A. Sakib, Unique Rahangdale, A. Lohia, D. Agonafer","doi":"10.1109/ITHERM.2017.7992612","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992612","url":null,"abstract":"The assessment of board level solder joint reliability during thermal cycling is very important for electronic packages. During thermal cycling, the mismatch in Coefficient of Thermal Expansion (CTE) between the materials used in the package induces stress on the solder interconnects and results in deformation and stresses. Finite element tools are widely used for rapid design optimization and also for understanding board level reliability issues. Lumped board modeling approach, explicit geometry approach, and ECAD approach are the three widely used approaches for creating models for Printed Circuit Boards (PCBs). Mapping the metal fraction in each layer from ECAD data usually results in highly accurate and fast solutions. However, in situations where the ECAD data is not available the lump approach is employed as explicit geometry approach requires very large mesh size and very long solution times. In the lump approach, orthotropic elastic material properties are assigned to PCBs. However, for temperatures near and beyond the glass transition temperature, materials behave in a viscoelastic manner. In which case, considering viscoelastic properties would result in a more accurate representation than the orthotropic elastic lump model. In this paper, we present a comparative study on the orthotropic linear elastic and viscoelastic modeling of PCBs and how it affects the board level reliability of Wafer Chip Scale Package (WCSP) under thermal cycling. The viscoelastic material properties of PCBs are characterized using Dynamic Mechanical Analyzer (DMA). The frequency and temperature dependent complex moduli are obtained from the DMA. The obtained results are used to model the PCBs as viscoelastic materials on ANSYS 17.2. Thermal cycling is performed in ANSYS and the results obtained are compared to those obtained from the elastic modeling of PCBs.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126935025","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/ITHERM.2017.7992519
Jiaxing Liang, M. Bakir, Y. Joshi
This paper presents thermal performance characterization of ultra-thin silicon vapor chambers suitable for integration into packages, including possibly interposers. 720±10 pm thick silicon vapor chambers at three different wick porosities have been fabricated using photolithography and deep reactive ion etching (DRIE) to create chambers, followed by inkjet printing and self-assembly to create patterned bi-porous monolayer copper powder wick structures within the chambers, and finally completed by the use of a low outgassing epoxy to bond the vapor chambers. Vapor chambers were attached with copper tubing using epoxy and were evacuated to 1.2 Pa, prior to charging with de-ionized water. A resistance heater provided heat to the evaporator, and a pin fin heat sink rejected heat to the ambient from the peripheral extension of the vapor chamber. The effect of wick porosity and wick saturation ratio on the performance and reliability of the vapor chambers were studied. Experimental results showed that at a porosity of 0.767, with wick saturation ratio of approximately 50%, the thermal resistance with air cooling was 2.5 K/W, at a heat flux of 7.6 W/cm2. The lowest thermal resistance of a charged sample was 38% of an uncharged sample's, and was 74% of a 750±25 pm solid silicon substrate's thermal resistance. Testing for 120 hrs showed no significant degradation of the performance of the vapor chambers.
{"title":"Microfabricated thin silicon vapor chamber for low profile thermal management","authors":"Jiaxing Liang, M. Bakir, Y. Joshi","doi":"10.1109/ITHERM.2017.7992519","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992519","url":null,"abstract":"This paper presents thermal performance characterization of ultra-thin silicon vapor chambers suitable for integration into packages, including possibly interposers. 720±10 pm thick silicon vapor chambers at three different wick porosities have been fabricated using photolithography and deep reactive ion etching (DRIE) to create chambers, followed by inkjet printing and self-assembly to create patterned bi-porous monolayer copper powder wick structures within the chambers, and finally completed by the use of a low outgassing epoxy to bond the vapor chambers. Vapor chambers were attached with copper tubing using epoxy and were evacuated to 1.2 Pa, prior to charging with de-ionized water. A resistance heater provided heat to the evaporator, and a pin fin heat sink rejected heat to the ambient from the peripheral extension of the vapor chamber. The effect of wick porosity and wick saturation ratio on the performance and reliability of the vapor chambers were studied. Experimental results showed that at a porosity of 0.767, with wick saturation ratio of approximately 50%, the thermal resistance with air cooling was 2.5 K/W, at a heat flux of 7.6 W/cm2. The lowest thermal resistance of a charged sample was 38% of an uncharged sample's, and was 74% of a 750±25 pm solid silicon substrate's thermal resistance. Testing for 120 hrs showed no significant degradation of the performance of the vapor chambers.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116441149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/ITHERM.2017.7992518
Feng Zhou, Yanghe Liu, S. Joshi, E. Dede, Xinfa Chen, A. Justin
Strategically controlling heat flow will enable new functionality for future electronics and energy storage systems. Potential performance enhancements include confining and releasing heat in a predetermined fashion, heat flux shielding, or ensuring more isothermal operation. This article experimentally verifies operation of a vapor chamber that exhibits dual heat flux rectification and thermal switch functions. The sealed device comprises three internal layers: a sintered copper wick evaporator is saturated with a working liquid; a condenser is functionalized with a superhydrophobic coating to promote dropwise condensation of vapor; and a low-thermal-conductivity spacer between the two opposing surfaces establishes a fixed vapor gap. By properly controlling the internal environment of the chamber through precision charging, the boiling point of the working fluid at the evaporator surface is set to a desired temperature. During forward operation, vapor generated on the evaporator surface is condensed on the superhydrophobic surface in a dropwise mode; via the release of surface energy upon condensate droplet coalescence, liquid droplets jump back to the evaporator, completing the passive phase-change-based heat flow cycle. During reverse operation, where heat is applied to the superhydrophobic surface, there is no mechanism for liquid resupply to the surface, and heat is transferred by conduction/convection across the vapor gap. Experimental results indicate the vapor chamber operates as a thermal switch, yielding a difference in thermal conductance before and after reaching the boiling point. The device also exhibits heat flux rectification depending upon the direction (i.e., forward/reverse operation) of heat flow. The ratios of effective thermal conductivities in “on” versus ‘off’ modes, for switching and diode functions, are measured to be ∼18:1. Practical challenges with the current prototype and opportunities for performance enhancement are discussed.
{"title":"Vapor chamber with thermal diode and switch functions","authors":"Feng Zhou, Yanghe Liu, S. Joshi, E. Dede, Xinfa Chen, A. Justin","doi":"10.1109/ITHERM.2017.7992518","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992518","url":null,"abstract":"Strategically controlling heat flow will enable new functionality for future electronics and energy storage systems. Potential performance enhancements include confining and releasing heat in a predetermined fashion, heat flux shielding, or ensuring more isothermal operation. This article experimentally verifies operation of a vapor chamber that exhibits dual heat flux rectification and thermal switch functions. The sealed device comprises three internal layers: a sintered copper wick evaporator is saturated with a working liquid; a condenser is functionalized with a superhydrophobic coating to promote dropwise condensation of vapor; and a low-thermal-conductivity spacer between the two opposing surfaces establishes a fixed vapor gap. By properly controlling the internal environment of the chamber through precision charging, the boiling point of the working fluid at the evaporator surface is set to a desired temperature. During forward operation, vapor generated on the evaporator surface is condensed on the superhydrophobic surface in a dropwise mode; via the release of surface energy upon condensate droplet coalescence, liquid droplets jump back to the evaporator, completing the passive phase-change-based heat flow cycle. During reverse operation, where heat is applied to the superhydrophobic surface, there is no mechanism for liquid resupply to the surface, and heat is transferred by conduction/convection across the vapor gap. Experimental results indicate the vapor chamber operates as a thermal switch, yielding a difference in thermal conductance before and after reaching the boiling point. The device also exhibits heat flux rectification depending upon the direction (i.e., forward/reverse operation) of heat flow. The ratios of effective thermal conductivities in “on” versus ‘off’ modes, for switching and diode functions, are measured to be ∼18:1. Practical challenges with the current prototype and opportunities for performance enhancement are discussed.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128465207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/ITHERM.2017.7992620
P. Lall, Hao Zhang, Lynn Davis
This paper focuses on the color stability degradation analysis and modeling for the commercially available high power warm white phosphor converted LED (pc-LED) packages under both high temperature and high humidity conditions. During the experiment, 3 kinds of different high power pc-LEDs were subjected to both high temperature, and high relative humidity (85°C/85%RH, 75°C/75%RH, 65°C/90%RH) accelerated life test with a 350mA bias current. Experimental results show that the phosphor binder layer of the pc-LEDs can swell and the color stability of LEDs degrades significantly. High temperature and humidity will oxidize the phosphor particles and oxidized phosphor particles shift the phosphor emission spectrum to the lower energy wavelength. The redistribution and oxidation of phosphor particles inside the phosphor binder will cause dramatically degradation of colorimetric properties of LED package in a very short time. Also, a closed form color shift model is built to project the color shift distance forward and prognosticate the color stability of LED packages. In the proposed model, not only temperature and humidity are included, but also the package characteristics, such as phosphor particles diameter, phosphor binder thickness. Compared with the experimental data, it is found that the color shift model can predict the color shift distance of the LED packages in an acceptable range.
{"title":"Color shift analysis and modeling of high power warm white pc-LED under high temperature and high humidity environment","authors":"P. Lall, Hao Zhang, Lynn Davis","doi":"10.1109/ITHERM.2017.7992620","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992620","url":null,"abstract":"This paper focuses on the color stability degradation analysis and modeling for the commercially available high power warm white phosphor converted LED (pc-LED) packages under both high temperature and high humidity conditions. During the experiment, 3 kinds of different high power pc-LEDs were subjected to both high temperature, and high relative humidity (85°C/85%RH, 75°C/75%RH, 65°C/90%RH) accelerated life test with a 350mA bias current. Experimental results show that the phosphor binder layer of the pc-LEDs can swell and the color stability of LEDs degrades significantly. High temperature and humidity will oxidize the phosphor particles and oxidized phosphor particles shift the phosphor emission spectrum to the lower energy wavelength. The redistribution and oxidation of phosphor particles inside the phosphor binder will cause dramatically degradation of colorimetric properties of LED package in a very short time. Also, a closed form color shift model is built to project the color shift distance forward and prognosticate the color stability of LED packages. In the proposed model, not only temperature and humidity are included, but also the package characteristics, such as phosphor particles diameter, phosphor binder thickness. Compared with the experimental data, it is found that the color shift model can predict the color shift distance of the LED packages in an acceptable range.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128619368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/ITHERM.2017.7992607
Quanming Li, A. Han, Guo Yang, Yuping Hong, Zhiguo Zhang, Linfang Jin, Jie Yang
Detachable (2-in-1) notebooks are the development trend in the ultra-thin notebook space, combining the advantages of both, a notebook and a tablet. Thinness, low weight, and quietness, along with a fashionable look, are some of the most important competitive factors of an ultra-thin notebook. However, these same factors severely limit its thermal performance, making thermal design of an ultra-thin notebook very challenging. The paper presents various analysis methods for an ultra-thin notebook, and explores, based on Huawei MateBook, novel passive thermal designs and key cooling technologies for a 2-in-1 notebook. The paper also investigates the thermo-physical limits, process boundaries, and costs of the various thermal technologies and provides the requirements and ideas for the passive thermal solutions for the next generation ultra-thin notebooks.
{"title":"Technical challenges and novel passive cooling technologies for ultra-thin notebooks","authors":"Quanming Li, A. Han, Guo Yang, Yuping Hong, Zhiguo Zhang, Linfang Jin, Jie Yang","doi":"10.1109/ITHERM.2017.7992607","DOIUrl":"https://doi.org/10.1109/ITHERM.2017.7992607","url":null,"abstract":"Detachable (2-in-1) notebooks are the development trend in the ultra-thin notebook space, combining the advantages of both, a notebook and a tablet. Thinness, low weight, and quietness, along with a fashionable look, are some of the most important competitive factors of an ultra-thin notebook. However, these same factors severely limit its thermal performance, making thermal design of an ultra-thin notebook very challenging. The paper presents various analysis methods for an ultra-thin notebook, and explores, based on Huawei MateBook, novel passive thermal designs and key cooling technologies for a 2-in-1 notebook. The paper also investigates the thermo-physical limits, process boundaries, and costs of the various thermal technologies and provides the requirements and ideas for the passive thermal solutions for the next generation ultra-thin notebooks.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"77 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116361027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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