R. Dejaeger, O. Lefort, Mathieu Jeanneteau, J. Muguet
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引用次数: 2
Abstract
In this paper, we present the concepts used and the optimizations carried out by Thales to increase the performances and reliability of a newly developed accelerometer. Previous work already showed that the accelerometer is compatible with Navigation-grade applications and that a high maturity level of the product has been reached. This paper will focus this time on the solutions implemented on the Application-Specific Integrated Circuit (ASIC) to drive the resonator with high vibration amplitude and to obtain low electronic noise, both leading to a very good Signal-to-Noise Ratio (SNR). The implemented Initiated and Continuous Built-In Test (IBIT and CBIT) that increase the reliability even further will also be presented.
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