M. Panicker, M. Hyslop, S. Nelson, R. Mongia, E. Ewy
{"title":"VIA/BGA/sup (R)/: a low-cost, high-performance packaging technology for broadband telecommunications","authors":"M. Panicker, M. Hyslop, S. Nelson, R. Mongia, E. Ewy","doi":"10.1109/ETS.2000.916535","DOIUrl":null,"url":null,"abstract":"A ceramic BGA packaging technology for broadband applications such as LMDS and SONET/SDH is described. The package is designed for the bandwidth of DC-32 GHz. Manufactured on VIA/PLANE/sup (R)/ using semiconductor processing techniques in an array format, it provides the ability to assemble and test the devices in arrays for maximum productivity. The paper describes the electromagnetic modeling, design, manufacture and testing of the package. Its electrical performance is compared with the theoretical model. The thermal model of the package with device on PCB is also presented. The package attributes are compared with the conventional leaded, microstrip/stripline and leadless formats.","PeriodicalId":291027,"journal":{"name":"2000 IEEE Emerging Technologies Symposium on Broadband, Wireless Internet Access. Digest of Papers (Cat. No.00EX414)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE Emerging Technologies Symposium on Broadband, Wireless Internet Access. Digest of Papers (Cat. No.00EX414)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ETS.2000.916535","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A ceramic BGA packaging technology for broadband applications such as LMDS and SONET/SDH is described. The package is designed for the bandwidth of DC-32 GHz. Manufactured on VIA/PLANE/sup (R)/ using semiconductor processing techniques in an array format, it provides the ability to assemble and test the devices in arrays for maximum productivity. The paper describes the electromagnetic modeling, design, manufacture and testing of the package. Its electrical performance is compared with the theoretical model. The thermal model of the package with device on PCB is also presented. The package attributes are compared with the conventional leaded, microstrip/stripline and leadless formats.