The HMM-TLP Miscorrelation at Wafer Level Tests

Abstract

A strong miscorrelation between TLP maximum current to failure and corresponding estimated onwafer-HMM pulse passing level of dual-direction SCR ESD device was studied. For multiple SCR ESD devices in 5-80V voltage range the effect was represented by low HMM passing level due to burnout of the structure Npocket to P-substrate isolation junction. It is shown that the phenomenon is specific to the on-wafer HMM test setup itself and is the result of the direct strong coupling of the wafer to the prober chuck at system ground under inductive impedance of the HMM tool connection to the DUT.