Loop Delay Correction for Adaptive Digital Linearization of Power Amplifiers

Shigang Tang, Ke Gong, Jun Wang, Kewu Peng, Changyong Pan, Zhixing Yang
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引用次数: 17

Abstract

As one of the most common linearization techniques, adaptive digital predistortion minimizes the difference between the input signal of the predistorter and the feedback signal from the power amplifier. The loop delay between these two signals must be controlled precisely so that the convergence of the predistorter should be assured. In this paper a novel two-stage loop delay correction scheme is presented. In the first stage, the integer delay between the input signal and the feedback signal is estimated based on the cross-correlation of them. In the second stage, the fractional delay between these two signals are corrected by a delay lock loop (DLL) circuit, in which a novel timing error detector used as the discriminator is proposed. The proposed loop delay correction scheme is applied to an adaptive digital predistorter in an orthogonal frequency-division multiplexing (OFDM) system. Simulation results show that the proposed loop delay correction method eliminates the loop delay perfectly, so that nearly optimal power spectral density (PSD) performance is achieved and a high degree of linearization is realized.
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功率放大器自适应数字线性化的环路延迟校正
作为最常用的线性化技术之一,自适应数字预失真可以将预失真器输入信号与功率放大器反馈信号之间的差异最小化。为了保证预失真器的收敛性,必须精确地控制这两个信号之间的环路延迟。本文提出了一种新的两级环路延迟校正方案。在第一阶段,根据输入信号与反馈信号的相互关系估计输入信号与反馈信号之间的整数延迟。在第二阶段,两个信号之间的分数级延迟通过延迟锁环电路进行校正,其中提出了一种新的时间误差检测器作为鉴别器。将提出的环路延迟校正方案应用于正交频分复用(OFDM)系统中的自适应数字预失真器。仿真结果表明,所提出的环路延迟校正方法可以很好地消除环路延迟,从而获得接近最优的功率谱密度(PSD)性能,并实现了高度的线性化。
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