645 V quasi-vertical GaN power transistors on silicon substrates

Chao Liu, R. Khadar, E. Matioli
{"title":"645 V quasi-vertical GaN power transistors on silicon substrates","authors":"Chao Liu, R. Khadar, E. Matioli","doi":"10.1109/ISPSD.2018.8393647","DOIUrl":null,"url":null,"abstract":"In this paper, we present GaN-on-Si vertical transistors consisting of a 6.7 μm thick n-p-n heterostructure grown on 6-inch silicon substrates by MOCVD. The fabricated vertical trench gate MOSFETs exhibited E-mode operation with a threshold voltage of 3.3 V and an on/off ratio of over 108. A specific on-resistance of 6.8 mň-cm2 and a high off-state breakdown voltage of 645 V were achieved. These results show the great potential of the GaN-on-Si platform for the next generation of cost-effective power electronics.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2018.8393647","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

In this paper, we present GaN-on-Si vertical transistors consisting of a 6.7 μm thick n-p-n heterostructure grown on 6-inch silicon substrates by MOCVD. The fabricated vertical trench gate MOSFETs exhibited E-mode operation with a threshold voltage of 3.3 V and an on/off ratio of over 108. A specific on-resistance of 6.8 mň-cm2 and a high off-state breakdown voltage of 645 V were achieved. These results show the great potential of the GaN-on-Si platform for the next generation of cost-effective power electronics.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
硅衬底上645 V准垂直GaN功率晶体管
在本文中,我们提出了由6.7 μm厚的n-p-n异质结构组成的GaN-on-Si垂直晶体管,通过MOCVD在6英寸硅衬底上生长。所制备的垂直沟槽栅mosfet表现出e模式工作,阈值电压为3.3 V,通/关比超过108。实现了6.8 mň-cm2的导通电阻和645 V的高断态击穿电压。这些结果显示了GaN-on-Si平台在下一代具有成本效益的电力电子产品中的巨大潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
CMOS bi-directional ultra-wideband galvanically isolated die-to-die communication utilizing a double-isolated transformer Local lifetime control for enhanced ruggedness of HVDC thyristors P-gate GaN HEMT gate-driver design for joint optimization of switching performance, freewheeling conduction and short-circuit robustness Influence of the off-state gate-source voltage on the transient drain current response of SiC MOSFETs Reduction of RonA retaining high threshold voltage in SiC DioMOS by improved channel design
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1