Mooli Shashank Reddy, Tejendra Dixit, K. P. Pradhan
{"title":"Double Gate NCFET : A New Approach for Low Subthreshold Swing","authors":"Mooli Shashank Reddy, Tejendra Dixit, K. P. Pradhan","doi":"10.1109/icee50728.2020.9776673","DOIUrl":null,"url":null,"abstract":"NCFETs(Negative Capacitance Field Effect Transistors) are commonly known for their Low Power Consumption[4]. As the name itself suggests that it uses a Negative Capacitance For the Voltage Amplification. This Amplification is due to the polarisation in the ferroelectric material, which is used as Negative Capacitance[5]. Due to the Orderly Alignment of the Dipoles in Ferroelectric material when an voltage is applied there will be an enhanced electric field which inturn enhances the voltage. So that there is an voltage amplification. This paper explores an approach to design NCFETS with a lower subthreshold swing and aslo details about the voltage amplification. This model is verified with several other model for an thin body, double-gate FET architecture.","PeriodicalId":436884,"journal":{"name":"2020 5th IEEE International Conference on Emerging Electronics (ICEE)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 5th IEEE International Conference on Emerging Electronics (ICEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/icee50728.2020.9776673","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
NCFETs(Negative Capacitance Field Effect Transistors) are commonly known for their Low Power Consumption[4]. As the name itself suggests that it uses a Negative Capacitance For the Voltage Amplification. This Amplification is due to the polarisation in the ferroelectric material, which is used as Negative Capacitance[5]. Due to the Orderly Alignment of the Dipoles in Ferroelectric material when an voltage is applied there will be an enhanced electric field which inturn enhances the voltage. So that there is an voltage amplification. This paper explores an approach to design NCFETS with a lower subthreshold swing and aslo details about the voltage amplification. This model is verified with several other model for an thin body, double-gate FET architecture.