The data and read/write controller for March-based SRAM diagnostic algorithm MBIST

Abstract

This paper presents the implementation of March-based algorithm as proposed in [1] into an Memory Built-in Self-Test (MBIST) data and read/write controller. The design uses the7 approach of Finite S täte M achine (FSM)-based a rchitecture which is more plausible since the design was part of the engine that will be exclusively developed for the testing of this algorithm alone. This controller will represent a portion of MBIST engine that can be incorporated together with other portions to build a complete MBIST engine.