Optimizing a particle-in-cell code on Intel knights landing

Abstract

The particle-in-cell (PIC) code is one of the mainstream algorithms in the laser plasma research area. However, the programming challenges to achieve high performance of PIC codes on the Intel Knights Landing (KNL) processor is widely concerned by global laser plasma researchers. We took the VLPL-S, the PIC code developed at Shanghai Jiao Tong University, as an example to address this concern. We applied the three types of optimization: compute-oriented optimizations, parallel 10, and dynamic loading balancing. We evaluated the optimized VLPL-S code with real test cases on the KNL. The experiments results show our optimization can achieve 1.53X speedup in overall performance, and the performance on the KNL is 1.77X faster than that of a two-socket Intel Xeon E5-2697v4 node. The optimizations we developed for the VLPS-S code can be applied to the other PIC codes.