The architecture of a multicast broadband packet switch

Abstract

The authors propose an architecture that can switch hundreds of gigabits while meeting a wide variety of service requirements. The switch can be constructed out of a few atomic cell types with regular interconnection patterns. This simple structure lends itself to very effective VLSI implementation. The multicast packet switch consists of three internally nonblocking, self-routing subnetworks. First, the selector subnetwork arbitrates among competing demands for copies to satisfy real-time requirements. The copy subnetwork then makes the copies and the switch subnetwork routes the packet copies to their final destinations. The authors detail the architecture and operation of the multicast switch.<>