A built-in calibration system with a reduced FFT engine for linearity optimization of low power LNA

Abstract

A digital built-in calibration (BIC) system with a power and area optimized on-chip fast Fourier transform (FFT) engine is presented to automatically adjust the linearity of a tunable RF low-noise amplifier (LNA) operating at 2.4GHz. An envelope detection circuit is used to extract the linearity characteristics at low frequencies, enabling the sampling and digital signal processing at low rates. To compensate the low gain of an envelope detector and to enhance reliability of spectral analysis, an RF amplifier is designed between the LNA and the envelope detector. The output of the envelope detector is digitized before the spectrum calculation with the integrated FFT for estimation of the third-order intermodulation (IM3) distortion specification of the LNA. The digitally-assisted closed-loop calibration scheme is demonstrated with simulations using a two-tone test with 1MHz tone spacing, a 512-point FFT engine, a 10-bit analog-to-digital converter model, and digital blocks operating with a 51.2MHz clock frequency. The total time required for calibration is 485μs including delays of 1.2μs to allow settling of the LNA output after capacitor array changes for tuning. In order to validate the proposed BIC technique with device mismatch effects, Monte Carlo simulations are performed with the same condition at transient simulations, where the results are well matched with the optimum IM3 component values calculated at the output node of LNA. The digital blocks were implemented using a standard 0.13μm CMOS technology.