Cell Switched Network-on-Chip -- Candidate for Billion-Transistor System-on-Chips

Abstract

Wormhole routing has been widely adopted for network-on-chip (NoC). We demonstrate that the common belief that wormhole routing requires very little buffer space is no longer true when deployed in billion-transistor SoCs. We propose a Cell Switched NoC (CS-NoC) paradigm that requires less buffer space than wormhole routing. It has been demonstrated that cell switched network has higher throughput, lower latency than wormhole routing, and are less sensitive to bursty traffic. Therefore, CS-NoC is a promising candidate for billion-transistor SoCs.