{"title":"Bytewise Register Allocation","authors":"P. K. Krause","doi":"10.1145/2764967.2764971","DOIUrl":null,"url":null,"abstract":"Traditionally, variables have been considered as atoms by register allocation: Each variable was to be placed in one register, or spilt (placed in main memory) or rematerialized (recalculated as needed). Some flexibility arose from what would be considered a register: Register aliasing allowed to treat a register meant to hold a 16-bit variable as two registers that could hold an 8-bit variable each. We allow for far more lexibility in register allocation: We decide on the storage of variables bytewise, i. e. we decide for each individual byte in a variable whether to store it in memory or a register, and consider any byte of any register as a possible storage location. We implemented a backend for the STM8 architecture (STMicroelectronics' current 8-bit architecture) in the C-compiler sdcc, and experimentally evaluate the beneits of bytewise register allocation. The results show that bytewise register allocation can result in substantial improvements in the generated code. Optimizing for code size we obtained 27.2%, 13.2% and 9.2% reductions in code size in the Whetstone, Dhrystone and Coremark benchmarks, respectively, when using bytewise allocation and spilling compared to conventional allocation.","PeriodicalId":110157,"journal":{"name":"Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2764967.2764971","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

Traditionally, variables have been considered as atoms by register allocation: Each variable was to be placed in one register, or spilt (placed in main memory) or rematerialized (recalculated as needed). Some flexibility arose from what would be considered a register: Register aliasing allowed to treat a register meant to hold a 16-bit variable as two registers that could hold an 8-bit variable each. We allow for far more lexibility in register allocation: We decide on the storage of variables bytewise, i. e. we decide for each individual byte in a variable whether to store it in memory or a register, and consider any byte of any register as a possible storage location. We implemented a backend for the STM8 architecture (STMicroelectronics' current 8-bit architecture) in the C-compiler sdcc, and experimentally evaluate the beneits of bytewise register allocation. The results show that bytewise register allocation can result in substantial improvements in the generated code. Optimizing for code size we obtained 27.2%, 13.2% and 9.2% reductions in code size in the Whetstone, Dhrystone and Coremark benchmarks, respectively, when using bytewise allocation and spilling compared to conventional allocation.
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按字节分配寄存器
传统上,通过寄存器分配将变量视为原子:每个变量被放置在一个寄存器中,或者被拆分(放在主存中),或者被重新物化(根据需要重新计算)。一些灵活性来自于被认为是寄存器的东西:寄存器混叠允许将一个存储16位变量的寄存器视为两个可以分别存储8位变量的寄存器。我们允许在寄存器分配方面有更大的灵活性:我们按字节决定变量的存储,也就是说,我们决定变量中的每个字节是存储在内存中还是存储在寄存器中,并且考虑任何寄存器的任何字节作为可能的存储位置。我们在c编译器sdcc中实现了STM8架构(意法半导体目前的8位架构)的后端,并实验评估了按字节分配寄存器的好处。结果表明,按字节分配寄存器可以大大改进生成的代码。在优化代码大小时,我们在wheetstone, Dhrystone和Coremark基准测试中分别获得了27.2%,13.2%和9.2%的代码大小减少,当使用字节分配和溢出时,与传统分配相比。
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