Multiplane Virtual Channel Router for Network-on-Chip Design

Abstract

Network-on-chip is alternative paradigm to improve communication bandwidth compared to bus-based communication, and its performance largely depends on architecture of router. In this paper, multiplane virtual-channel router which has multiple crossbar switches and modified switch allocator is proposed to enhance the latency and throughput performance. Theoretically, we show this multiplane router has much better latency performance compare to single plane router. Also, we carry out the RTL simulation in order to show that the multiplane router with small number of virtual-channels offering smaller hardware complexity than single plane router with large number of virtual-channels.