Improvement of within Wafer Uniformity of Device Parameters by Gradient Temperature Control with Bell Jar Hot Wall RTP

KyungWon Lee, S. Kim, P. Frisella, B. Jacobs, G. Cai, R. Reece, N. Kwak, Chulyoung Ham, K. Joo, Dongho Lee, SangWook Park, Sungki Park
{"title":"Improvement of within Wafer Uniformity of Device Parameters by Gradient Temperature Control with Bell Jar Hot Wall RTP","authors":"KyungWon Lee, S. Kim, P. Frisella, B. Jacobs, G. Cai, R. Reece, N. Kwak, Chulyoung Ham, K. Joo, Dongho Lee, SangWook Park, Sungki Park","doi":"10.1109/RTP.2006.368010","DOIUrl":null,"url":null,"abstract":"This paper presents a method to minimize cross-wafer threshold voltage variation, specifically radial variation, on device wafers using the inherent characteristics and repeatability of a bell-jar hot wall RTP system. The temperature uniformity of Axcelis' bell-jar hot wall RTP is controlled by a three-zone temperature gradient. It is possible to change the cross-wafer thermal uniformity from a flat or uniform distribution to either edge-hot, or edge-cold. The settings are characterized and optimized using sheet resistance monitors. It is demonstrated that by optimizing the power levels of the three-zone furnace, an optimized temperature gradient can be repeatedly formed and visualized by convex or concave sheet resistance maps. As results of the radial uniformity tuning, the RTP user can minimize the affect of process variations from other FEOL processes, such as etch or lithography as it is compensated by RTP process. This capability could enhance wafer yield below 80nm technology flash device through better control and uniformity of device parameters","PeriodicalId":114586,"journal":{"name":"2006 14th IEEE International Conference on Advanced Thermal Processing of Semiconductors","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 14th IEEE International Conference on Advanced Thermal Processing of Semiconductors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RTP.2006.368010","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

This paper presents a method to minimize cross-wafer threshold voltage variation, specifically radial variation, on device wafers using the inherent characteristics and repeatability of a bell-jar hot wall RTP system. The temperature uniformity of Axcelis' bell-jar hot wall RTP is controlled by a three-zone temperature gradient. It is possible to change the cross-wafer thermal uniformity from a flat or uniform distribution to either edge-hot, or edge-cold. The settings are characterized and optimized using sheet resistance monitors. It is demonstrated that by optimizing the power levels of the three-zone furnace, an optimized temperature gradient can be repeatedly formed and visualized by convex or concave sheet resistance maps. As results of the radial uniformity tuning, the RTP user can minimize the affect of process variations from other FEOL processes, such as etch or lithography as it is compensated by RTP process. This capability could enhance wafer yield below 80nm technology flash device through better control and uniformity of device parameters
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
用钟罩热壁RTP梯度温度控制改善晶圆内器件参数均匀性
本文提出了一种利用钟罩热壁RTP系统的固有特性和可重复性来最小化器件晶圆上的跨晶圆阈值电压变化,特别是径向变化的方法。Axcelis型钟罩热壁RTP的温度均匀性由三区温度梯度控制。可以将晶圆间的热均匀性从平坦或均匀分布改变为边热或边冷。使用薄片电阻监视器对设置进行表征和优化。结果表明,通过优化三区炉的功率水平,可以反复形成优化后的温度梯度,并通过凸或凹板电阻图进行可视化。作为径向均匀性调整的结果,RTP用户可以最大限度地减少其他FEOL工艺变化的影响,如蚀刻或光刻,因为它是由RTP工艺补偿的。这种能力可以通过更好的控制和均匀的器件参数来提高80nm以下工艺闪存器件的晶圆良率
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Mechanical Stress in Silicon Based Materials: Evolution Upon Annealing and Impact on Devices Performances Micro-Scale Sheet Resistance Measurements on Ultra Shallow Junctions High-Resolution Transmission Electron Microscopy of Interfaces between thin Nickel Layers on Si(001) After Nickel Silicide Formation under Various Annealing Conditions Hot Plate Emissivity Effect in Low Temperature Annealing Growing Importance of Fundamental Understanding of the Source of Process Variations
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1