{"title":"The Hardware-Software Co-design and Co-verification of SoC for an Embedded Home Gateway","authors":"Bing Guo, Yan Shen, Chuanwu Zhang","doi":"10.1109/SEC.2008.34","DOIUrl":null,"url":null,"abstract":"Home network is becoming an important part of global information infrastructure, where the embedded home gateway is a key information device to implement the interconnection and Internet access between devices in a home. In this paper, a SoC (system-on-a-chip) for embedded home gateway (EHGSoC) is proposed, which provides an integrated processing platform with the support of multiple network protocols, multiple hardware interfaces and reconfigurable computing. The hardware-software co-design and co-verification of the EHGSoC is deeply explored, whereas a co-design methodology with reconfigurable architecture is a focus. The aim of this research is to develop an EHGSoC and its corresponding system products, which are low power, high performance-to-price ratio, open and dependable.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 Fifth IEEE International Symposium on Embedded Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SEC.2008.34","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Home network is becoming an important part of global information infrastructure, where the embedded home gateway is a key information device to implement the interconnection and Internet access between devices in a home. In this paper, a SoC (system-on-a-chip) for embedded home gateway (EHGSoC) is proposed, which provides an integrated processing platform with the support of multiple network protocols, multiple hardware interfaces and reconfigurable computing. The hardware-software co-design and co-verification of the EHGSoC is deeply explored, whereas a co-design methodology with reconfigurable architecture is a focus. The aim of this research is to develop an EHGSoC and its corresponding system products, which are low power, high performance-to-price ratio, open and dependable.