Qingsong Shi, Chen Jian, Nan Zhang, Mingteng Cao, Tianzhou Chen
Chip multiprocessor (CMP) will become more popular in embedded systems. As clock frequency increases, dependency among core blocks rises, which therefore tends to reduce performance of system and be more unstable. Redundancy is a way to improve the dependability of the system. But the traditional methods cannot make full use of the computing capacity of CMP. In this paper, we propose a new redundancy mechanism. The whole system is reorganized using lightweight virtualization. A group of processors and a block of memory are treated as a single logical computing unit each of which corresponds to a processer separately. In this way, only a distributor and an arbiter need to be added into operating system with least effort. The distributor dispatches one task to all the logical computing units. After execution, the arbiter gathers all results to analyze whether they are dependable. Because the distributor and the arbiter are very simple, total overhead of the system are very low. Experiment results show the proposed method is practical with average overhead less than 8%.
{"title":"A Redundancy Mechanism under Single Chip Multiprocessor Architecture","authors":"Qingsong Shi, Chen Jian, Nan Zhang, Mingteng Cao, Tianzhou Chen","doi":"10.1109/SEC.2008.29","DOIUrl":"https://doi.org/10.1109/SEC.2008.29","url":null,"abstract":"Chip multiprocessor (CMP) will become more popular in embedded systems. As clock frequency increases, dependency among core blocks rises, which therefore tends to reduce performance of system and be more unstable. Redundancy is a way to improve the dependability of the system. But the traditional methods cannot make full use of the computing capacity of CMP. In this paper, we propose a new redundancy mechanism. The whole system is reorganized using lightweight virtualization. A group of processors and a block of memory are treated as a single logical computing unit each of which corresponds to a processer separately. In this way, only a distributor and an arbiter need to be added into operating system with least effort. The distributor dispatches one task to all the logical computing units. After execution, the arbiter gathers all results to analyze whether they are dependable. Because the distributor and the arbiter are very simple, total overhead of the system are very low. Experiment results show the proposed method is practical with average overhead less than 8%.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121251895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper presents a procedure developing a digital album based on an embedded Linux, using Qt, a powerful development toolkit. Being a new-fashioned digital consumable, the digital album considered as fashionable, user friendly and convenient. The mainly functions of the embedded digital album are that reviewing and managing the photos from DC. At the same time, it will include the following functions: to support the multi-format of picture, i.e. JPEG, BMP, and GIF etc; to display the photos as thumbnails; to configure the options of the system, i.e. choose the language of user interface. It also will support an external storage – CF card. When the CF card is inserted, the pictures will be loaded immediately, and display the thumbnails of the photos storing in this card. The hardware platform used in this project is a processor based on Intel's XScale PXA255, while the software platform is Embedded Linux and the development environment features is Qt and Qt/Embedded. Some key technical problems have been discussed in details, including files scanning, filename list storing, rotation of photos and communication between/inside the modules. Several loading pictures strategies have been compared in terms of time and space, which involves the single-thread & multi-thread, pre-loading and saving thumbnail mechanism, with the detailed test data given, and the optimized strategy has been worked out. The testing data indicated that this digital album system working stably and reliably.
{"title":"Design and Implementation of Embedded Digital Album","authors":"Chen Liang, Hao Weidong, Long Fei","doi":"10.1109/SEC.2008.26","DOIUrl":"https://doi.org/10.1109/SEC.2008.26","url":null,"abstract":"This paper presents a procedure developing a digital album based on an embedded Linux, using Qt, a powerful development toolkit. Being a new-fashioned digital consumable, the digital album considered as fashionable, user friendly and convenient. The mainly functions of the embedded digital album are that reviewing and managing the photos from DC. At the same time, it will include the following functions: to support the multi-format of picture, i.e. JPEG, BMP, and GIF etc; to display the photos as thumbnails; to configure the options of the system, i.e. choose the language of user interface. It also will support an external storage – CF card. When the CF card is inserted, the pictures will be loaded immediately, and display the thumbnails of the photos storing in this card. The hardware platform used in this project is a processor based on Intel's XScale PXA255, while the software platform is Embedded Linux and the development environment features is Qt and Qt/Embedded. Some key technical problems have been discussed in details, including files scanning, filename list storing, rotation of photos and communication between/inside the modules. Several loading pictures strategies have been compared in terms of time and space, which involves the single-thread & multi-thread, pre-loading and saving thumbnail mechanism, with the detailed test data given, and the optimized strategy has been worked out. The testing data indicated that this digital album system working stably and reliably.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122590514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Qingsong Shi, Chen Du, Nan Zhang, Jijun Ma, Tianzhou Chen
Security of embedded systems is becoming more and more important. IDS (instrusion detection system) has been designed to protect systems from being compromised by network attacks. A lot of researches have been done on it. However, most of them focus on complex and time-consuming detection methods to improve accuracy of the system, with assumption that IDS is running under control of general purpose operating systems (GPOS). In this way, the IDS itself will depress overall performance and cannot be guaranteed secure. In this paper, we present an embedded architecture of SPMOS-based IDS. SPMOS, located in SPM, is a little OS running under GPOS. Experiment results show that the architecture is fast. Based on this, we also design a simple IDS and conduct tests by integrating it into SPMOS and GPOS. The former consumes the latter's 8.3% time only, with less than 6.2% overhead, which verifies the architecture proposed is practical and efficient.
{"title":"SPMOS-Based Intrusion Detection Architecture","authors":"Qingsong Shi, Chen Du, Nan Zhang, Jijun Ma, Tianzhou Chen","doi":"10.1109/SEC.2008.16","DOIUrl":"https://doi.org/10.1109/SEC.2008.16","url":null,"abstract":"Security of embedded systems is becoming more and more important. IDS (instrusion detection system) has been designed to protect systems from being compromised by network attacks. A lot of researches have been done on it. However, most of them focus on complex and time-consuming detection methods to improve accuracy of the system, with assumption that IDS is running under control of general purpose operating systems (GPOS). In this way, the IDS itself will depress overall performance and cannot be guaranteed secure. In this paper, we present an embedded architecture of SPMOS-based IDS. SPMOS, located in SPM, is a little OS running under GPOS. Experiment results show that the architecture is fast. Based on this, we also design a simple IDS and conduct tests by integrating it into SPMOS and GPOS. The former consumes the latter's 8.3% time only, with less than 6.2% overhead, which verifies the architecture proposed is practical and efficient.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122146395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
With the rapid development of microprocessor, embedded multimedia products are gradually becoming the mainstream in the market. However, the high coding efficiency enabled by the H.264 video compression standard comes with substantially greater algorithmic complexity as compared to that of existing standards. And this additional complexity results in many difficulties in the implementation and optimization tasks. This paper analyzes the algorithms of the two time-consuming modules of integer transform and motion estimation in H.264. Then optimizes the two modules based on the extended instruction set of C64x/C64x+. Finally, deeply pipelined DSP solutions to two modules are presented in this paper. The experiment results show that optimizing parallel assembly can make the codes more efficient.
{"title":"Deeply Pipelined DSP Solution to Key Modules in H. 264","authors":"Jinxiu Zhu, Ning Cao, Yushan Chen, Guoxuan Li","doi":"10.1109/SEC.2008.44","DOIUrl":"https://doi.org/10.1109/SEC.2008.44","url":null,"abstract":"With the rapid development of microprocessor, embedded multimedia products are gradually becoming the mainstream in the market. However, the high coding efficiency enabled by the H.264 video compression standard comes with substantially greater algorithmic complexity as compared to that of existing standards. And this additional complexity results in many difficulties in the implementation and optimization tasks. This paper analyzes the algorithms of the two time-consuming modules of integer transform and motion estimation in H.264. Then optimizes the two modules based on the extended instruction set of C64x/C64x+. Finally, deeply pipelined DSP solutions to two modules are presented in this paper. The experiment results show that optimizing parallel assembly can make the codes more efficient.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129510210","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wang Li-feng, Niu Jian-wei, Ma Jian, Wang Wen-dong, Xiao Chen
Protecting the confidentiality and integrity of video information is one of the crucial security elements for many wireless video applications. Taking limited power, processor resource and bandwidth of mobile device into account, a lightweight luminance transform coefficients encryption (LTCE) algorithm, is proposed based on the special feature of the H.264 video coding standard. In LTCE algorithm, the luminance transform coefficients of residual data before entropy coding are adjustably partially encrypted by stream cipher, and it is discussed when ciphertext value are equal to zero in detail. Experimental results demonstrate the proposed algorithm that encrypts much less important data can achieve good security and high efficiency, as well as obtain low complexity and time cost. LTCE algorithm is suitable for security multimedia services for wireless application.
{"title":"A Lightweight Video Encryption Algorithm for Wireless Application","authors":"Wang Li-feng, Niu Jian-wei, Ma Jian, Wang Wen-dong, Xiao Chen","doi":"10.1109/SEC.2008.68","DOIUrl":"https://doi.org/10.1109/SEC.2008.68","url":null,"abstract":"Protecting the confidentiality and integrity of video information is one of the crucial security elements for many wireless video applications. Taking limited power, processor resource and bandwidth of mobile device into account, a lightweight luminance transform coefficients encryption (LTCE) algorithm, is proposed based on the special feature of the H.264 video coding standard. In LTCE algorithm, the luminance transform coefficients of residual data before entropy coding are adjustably partially encrypted by stream cipher, and it is discussed when ciphertext value are equal to zero in detail. Experimental results demonstrate the proposed algorithm that encrypts much less important data can achieve good security and high efficiency, as well as obtain low complexity and time cost. LTCE algorithm is suitable for security multimedia services for wireless application.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129060174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jindong Zhang, G. Qin, Yang Xun, Yue Cui, Tao Chen, Jianfei Jin
A communication model of distributed embedded system was presented though introducing a multiple buses example. The paper analyzes the communication delay under interaction of computation and communication, allocating inter-processor communication links, and schedule communication. The complex system can be divided into several parts and then the algorithm is applied to all the parts respectively. Some numerical results are also presented for illustration.
{"title":"Communication Analysis and Synthesis of Distributed Embedded Network System","authors":"Jindong Zhang, G. Qin, Yang Xun, Yue Cui, Tao Chen, Jianfei Jin","doi":"10.1109/SEC.2008.25","DOIUrl":"https://doi.org/10.1109/SEC.2008.25","url":null,"abstract":"A communication model of distributed embedded system was presented though introducing a multiple buses example. The paper analyzes the communication delay under interaction of computation and communication, allocating inter-processor communication links, and schedule communication. The complex system can be divided into several parts and then the algorithm is applied to all the parts respectively. Some numerical results are also presented for illustration.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113986057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Advances in computing applications in recent years have prompted the demand for more flexible scheduling models and multiprocessor scheduling algorithm. The DWCS (dynamic window-constrained scheduling) is a flexible scheduling algorithm. In the scheduling algorithms on multiprocessor real time systems, the heuristic algorithm is an important algorithm and a known heuristic algorithm is myopic algorithm [1]. The performance of the myopic algorithm is greatly based on heuristic functions. In this paper, we present an improved heuristic algorithm, which has a new heuristic function for window-constrained real-time tasks. The improved algorithm considers not only the deadlines and the resource requirements of a task, but also the processing time of the task. The most important metric for real-time scheduling algorithms is scheduling success ratio. To evaluate the effectiveness of the improved algorithm, we have done extensive simulation studies. The simulation results show that the scheduling success ratio of the improved heuristic algorithm is superior to that of myopic algorithm.
{"title":"A Dynamic Window-Constrained Scheduling Algorithm for Multiprocessor Real-Time Systems","authors":"Zhu Xiangbin","doi":"10.1109/SEC.2008.11","DOIUrl":"https://doi.org/10.1109/SEC.2008.11","url":null,"abstract":"Advances in computing applications in recent years have prompted the demand for more flexible scheduling models and multiprocessor scheduling algorithm. The DWCS (dynamic window-constrained scheduling) is a flexible scheduling algorithm. In the scheduling algorithms on multiprocessor real time systems, the heuristic algorithm is an important algorithm and a known heuristic algorithm is myopic algorithm [1]. The performance of the myopic algorithm is greatly based on heuristic functions. In this paper, we present an improved heuristic algorithm, which has a new heuristic function for window-constrained real-time tasks. The improved algorithm considers not only the deadlines and the resource requirements of a task, but also the processing time of the task. The most important metric for real-time scheduling algorithms is scheduling success ratio. To evaluate the effectiveness of the improved algorithm, we have done extensive simulation studies. The simulation results show that the scheduling success ratio of the improved heuristic algorithm is superior to that of myopic algorithm.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132517335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wei Hong-xing, Du Xinming, Chen Youdong, Z. Xiaoliang
The author analyzes the control structure of open CNC (Computer Number Control) system and work principle of CORBA (Common Object Request Broker Architecture), and puts forward a open CNC system structure based on CORBA, then divides the system into several components according to their function. The author uses TAO (The ACE ORB, a concrete realization for CORBA) for system components as Soft Bus. The author defines interface of system components by OMG (Object Management Group) IDL (Interface Definition Language), and compiles the IDL file through IDL compiler and transforms to concrete implementation language, then develops the function of the system components. At last the author designs an experiment to verify the interchangeability of the system.
分析了开放式数控系统的控制结构和CORBA(公共对象请求代理体系结构)的工作原理，提出了一种基于CORBA的开放式数控系统结构，并根据系统的功能将系统划分为多个组件。系统组件采用CORBA的具体实现——TAO (The ACE ORB)作为软总线。通过对象管理组(OMG) IDL(接口定义语言)定义系统组件的接口，通过IDL编译器编译IDL文件并转换为具体的实现语言，开发系统组件的功能。最后通过实验验证了系统的互换性。
{"title":"Research of Open CNC System Based on CORBA","authors":"Wei Hong-xing, Du Xinming, Chen Youdong, Z. Xiaoliang","doi":"10.1109/SEC.2008.50","DOIUrl":"https://doi.org/10.1109/SEC.2008.50","url":null,"abstract":"The author analyzes the control structure of open CNC (Computer Number Control) system and work principle of CORBA (Common Object Request Broker Architecture), and puts forward a open CNC system structure based on CORBA, then divides the system into several components according to their function. The author uses TAO (The ACE ORB, a concrete realization for CORBA) for system components as Soft Bus. The author defines interface of system components by OMG (Object Management Group) IDL (Interface Definition Language), and compiles the IDL file through IDL compiler and transforms to concrete implementation language, then develops the function of the system components. At last the author designs an experiment to verify the interchangeability of the system.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133378372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Home network is becoming an important part of global information infrastructure, where the embedded home gateway is a key information device to implement the interconnection and Internet access between devices in a home. In this paper, a SoC (system-on-a-chip) for embedded home gateway (EHGSoC) is proposed, which provides an integrated processing platform with the support of multiple network protocols, multiple hardware interfaces and reconfigurable computing. The hardware-software co-design and co-verification of the EHGSoC is deeply explored, whereas a co-design methodology with reconfigurable architecture is a focus. The aim of this research is to develop an EHGSoC and its corresponding system products, which are low power, high performance-to-price ratio, open and dependable.
{"title":"The Hardware-Software Co-design and Co-verification of SoC for an Embedded Home Gateway","authors":"Bing Guo, Yan Shen, Chuanwu Zhang","doi":"10.1109/SEC.2008.34","DOIUrl":"https://doi.org/10.1109/SEC.2008.34","url":null,"abstract":"Home network is becoming an important part of global information infrastructure, where the embedded home gateway is a key information device to implement the interconnection and Internet access between devices in a home. In this paper, a SoC (system-on-a-chip) for embedded home gateway (EHGSoC) is proposed, which provides an integrated processing platform with the support of multiple network protocols, multiple hardware interfaces and reconfigurable computing. The hardware-software co-design and co-verification of the EHGSoC is deeply explored, whereas a co-design methodology with reconfigurable architecture is a focus. The aim of this research is to develop an EHGSoC and its corresponding system products, which are low power, high performance-to-price ratio, open and dependable.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117044953","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A kind of environmental monitoring system based on wireless mesh network with the core of embedded system ARM9 S3C2410 microprocessor is presented in the paper. The flexible and self-organizing wireless mesh network is used to achieve the real time acquisition and multi-hop wireless communication of parameters of the monitoring atmospheric environment such as SO2, NO2, NO, temperature, humidity and air pressure, etc. The network structure of the system is established, the hardware architecture of the system is designed, and the system working procedures is given. The entire monitoring system can be quickly arranged and rapidly withdrew without support of base station and has a strong self-healing capability and network robustness and can be used for a variety of occasional atmospheric environmental monitoring.
{"title":"Environmental Monitoring System with Wireless Mesh Network Based on Embedded System","authors":"Meijuan Gao, Fan Zhang, Jingwen Tian","doi":"10.1109/SEC.2008.28","DOIUrl":"https://doi.org/10.1109/SEC.2008.28","url":null,"abstract":"A kind of environmental monitoring system based on wireless mesh network with the core of embedded system ARM9 S3C2410 microprocessor is presented in the paper. The flexible and self-organizing wireless mesh network is used to achieve the real time acquisition and multi-hop wireless communication of parameters of the monitoring atmospheric environment such as SO2, NO2, NO, temperature, humidity and air pressure, etc. The network structure of the system is established, the hardware architecture of the system is designed, and the system working procedures is given. The entire monitoring system can be quickly arranged and rapidly withdrew without support of base station and has a strong self-healing capability and network robustness and can be used for a variety of occasional atmospheric environmental monitoring.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"378 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124715591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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