A single-electron shut-off transistor for a scalable sub-0.1 /spl mu/m memory

Abstract

The developed single-electron shut-off (SESO) transistor has a leakage current in the range of 10/sup -19/ A (less than one electron per 100 ms; typical DRAM refresh cycle) or better, and it ushers in an era of opportunities for 4-Gb-or-larger post-DRAM memories. In its ultra-thin (2 nm) polycrystalline silicon film, electron hopping between traps is dramatically suppressed because of its limited number of neighboring traps and the Coulomb blockade effect. A SESO memory gain cell using the SESO transistor, has an over 3,000 second retention time even without a memory capacitor.