{"title":"A QoS provisioned CIOQ packet switch using crossbar structure with m internal links","authors":"C. R. D. Santos, S. Motoyama","doi":"10.1109/ICW.2005.15","DOIUrl":null,"url":null,"abstract":"A QoS provisioned CIOQ switch using crossbar structure with m parallel lines per output port is proposed in this paper. The packets at input buffers are transferred to the output buffers by means of mxN internal lines. Since all internal lines have the same speed as external links, no internal clock speedup is required so that the proposed structure is suited for high-speed switches. The switch models for analysis are proposed and its performances are evaluated by means of queuing theory. The results show that only 2 internal links for each output port are sufficient for quick packet transfer from the input buffers to the output buffers. The proposed switch has also the feature that facilitates the choice of scheduler in order to satisfy the QoS of each class of service.","PeriodicalId":255955,"journal":{"name":"2005 Systems Communications (ICW'05, ICHSN'05, ICMCS'05, SENET'05)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 Systems Communications (ICW'05, ICHSN'05, ICMCS'05, SENET'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICW.2005.15","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A QoS provisioned CIOQ switch using crossbar structure with m parallel lines per output port is proposed in this paper. The packets at input buffers are transferred to the output buffers by means of mxN internal lines. Since all internal lines have the same speed as external links, no internal clock speedup is required so that the proposed structure is suited for high-speed switches. The switch models for analysis are proposed and its performances are evaluated by means of queuing theory. The results show that only 2 internal links for each output port are sufficient for quick packet transfer from the input buffers to the output buffers. The proposed switch has also the feature that facilitates the choice of scheduler in order to satisfy the QoS of each class of service.