Poster Abstract: I/O Contention Aware Mapping of Multi-Criticalities Real-Time Applications over Many-Core Architectures

Abstract

Many-core architectures are more promising hardware to design real-time systems than multi-core systems as they should enable an easier mastered integration of an higher number of applications, potentially of different level of criticalities. However, the worst-case behavior of the Network-on-Chip (NoC) for both inter-core and core-to-Input/Output (I/O) communications of critical applications must be established. We use the term core-to-I/O for both core communications from or to I/O interfaces. The mapping over the NoC of both critical and non-critical applications has an impact on the network contention these critical communications exhibit. So far, all existing mapping strategies have focused on inter-core communications. However, we claim that many-cores in embedded real-time systems will be integrated within backbone ethernet networks, as they mostly provide ethernet controllers as I/O interfaces. In this work, we first show that ethernet packets can be dropped due to an internal congestion in the NoC, if these core-to-I/O communications are not taken into account while mapping applications. To this end, we rely on a case study from the avionic domain. It is made of a critical Full Authority Digital Engine (FADEC) application and a non-critical Health Monitoring (HM) application of the engine, used for recognizing incipient failure conditions. Based on this analysis, we introduce our approach to map critical and non critical real-time applications over many-cores that reduces the WCTT of core-to-I/O communications. We show for two variants of our case study that our algorithm successfully find a mapping that avoids ethernet packets, whose payload are making the core-to-I/O communications, to be dropped. This demonstrates the benefits of our proposal compared to a state of the art mapping strategy that fails to do so.