D-C and transient analysis of networks using a digital computer

F. H. Branin, Development
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Abstract

An experimental program is described for computing the d-c and transient response of transistor switching circuits of arbitrary configuration and size (up to 20 transistors) using the IBM 704 computer. One important feature of the program which is discussed is its ability to compile all the necessary equations automatically from input data describing the circuit parameters and configuration. Another is the solution of the transient problem by numerical integration OS the differential equations for the linear part of the circuit separately from those describing the transistors , the output from each set of equations being used periodically as input for the other set. Con-sidcrable increase in speed of integration is obtained in this manner, The method of d-c analysis is based on a topological-matrix formulation of the linear part of the problem. and its solution by Kron's method, followed by an iterative procedure for satisfying certain nonlinear side conditions imposed by the transintors. Although the transient analysis also uses a matrix formulation of the required differential equations, it is not based on a topological approach. However, a generalized topological-matrix formulation of the transient problem is given in an appendix. The nature of a serious theoretical limit on the rate of integration of the network equations. is discussed since it constitutes the principal computational barrier to a rapid solution of the transient problem. An outline of the tnore important programming procedures involved in the topological-matrix formulation is also given. Certain shortcomings of the program, and pitfalls to be avoided are pointed out. In particular , the importance of being able to modify or replace the transistor equivalent circuit (network model) is emphasized. Finally, the computed responses of a four-transistor switching circuit are displayed and shown to agree well with the observed responses, Int reduction This paper is based on the experience gained in writing an experiental program for analyzing transistor switching circuits using the IBM 704 computer. Thin program, called TAP for " transistor analysis program " , 102 was developed to provide circuit-design engineers with the ability to carry out " computational experiments " to aid in understanding, as well as designing, switching circuits. Although this objective was reached, the program has become obsolete because it was restricted to the analyeis of circuits containing a certain type of diffused base transistor which is of limited interest. Consequently, the program is not being maintained nor is it being made available for …
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数字计算机网络的直流和暂态分析
本文描述了一个用IBM 704计算机计算任意结构和大小(最多20个晶体管)晶体管开关电路的直流和瞬态响应的实验程序。所讨论的程序的一个重要特点是它能够从描述电路参数和结构的输入数据自动编译所有必要的方程。另一种方法是将电路线性部分的微分方程与描述晶体管的微分方程分开进行数值积分来解决瞬态问题,每组方程的输出周期性地用作另一组方程的输入。这种方法大大提高了积分速度。直流分析的方法是基于问题线性部分的拓扑矩阵公式。用Kron法求解,然后迭代求解满足晶体管施加的某些非线性边条件。虽然暂态分析也使用所需微分方程的矩阵公式,但它不是基于拓扑方法。然而,在附录中给出了暂态问题的广义拓扑矩阵公式。本质上严重限制了网络方程积分率的理论限制。因为它构成了快速求解瞬态问题的主要计算障碍。本文还概述了拓扑矩阵公式中涉及的两个重要的规划程序。指出了该方案存在的不足和应避免的误区。特别强调了能够修改或替换晶体管等效电路(网络模型)的重要性。最后,显示了一个四晶体管开关电路的计算响应,结果表明,计算响应与观测响应吻合良好。本文是根据在IBM 704计算机上编写晶体管开关电路分析实验程序的经验编写的。被称为“晶体管分析程序”(TAP)的“薄程序”被开发出来,为电路设计工程师提供了进行“计算实验”的能力,以帮助理解和设计开关电路。虽然达到了这个目标,但是这个程序已经过时了,因为它仅限于分析包含某种类型的扩散基极晶体管的电路,这是有限的兴趣。因此,该程序没有得到维护,也没有提供给……
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