Design decisions in the pipelined architecture for Quantum Monte Carlo simulations

A. Gothandaraman, G. D. Peterson, R. Hinde, R. Harrison
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引用次数: 1

Abstract

The ground-state properties of atomic and molecular clusters can be obtained using Quantum Monte Carlo (QMC) simulations. We propose a reconfigurable hardware architecture using Field-Programmable Gate Arrays (FPGAs) to implement the kernels of the QMC application. To achieve higher clock rates, we experiment with different pipeline stages for each component of the design and develop a deeply pipelined architecture that provides the best performance in terms of clock rate, while at the same time has a modest use of embedded memory and multiplier resources so we can fit additional functions in a future implementation. Here, we discuss the details of the pipelined architecture and our design decisions while developing a general framework that can be used to obtain the potential energy of atomic or molecular clusters and extended to compute other useful properties.
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量子蒙特卡罗模拟的流水线架构中的设计决策
原子和分子团簇的基态性质可以通过量子蒙特卡罗(QMC)模拟得到。我们提出了一个可重构的硬件架构,使用现场可编程门阵列(fpga)来实现QMC应用程序的核心。为了实现更高的时钟速率,我们对设计的每个组件进行了不同的流水线阶段的实验,并开发了一个深度流水线架构,在时钟速率方面提供最佳性能,同时适度使用嵌入式内存和乘法器资源,以便我们可以在未来的实现中适应额外的功能。在这里,我们讨论了流水线架构的细节和我们的设计决策,同时开发了一个通用框架,可用于获得原子或分子簇的势能,并扩展到计算其他有用的属性。
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