{"title":"Data base of IP blocks developed in VHDL for multicarrier modem realization on FPGA","authors":"G. Marinova, C. Fernandès","doi":"10.1109/MELCON.2004.1346812","DOIUrl":null,"url":null,"abstract":"The paper describes a data base of IP (intellectual property) blocks for digital signal processing functions, developed in VHDL to be implemented for the realization of different multicarrier modem configurations on FPGA.","PeriodicalId":164818,"journal":{"name":"Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.04CH37521)","volume":"163 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.04CH37521)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MELCON.2004.1346812","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The paper describes a data base of IP (intellectual property) blocks for digital signal processing functions, developed in VHDL to be implemented for the realization of different multicarrier modem configurations on FPGA.
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