An EMC design risk assessment technique to retest or not to retest?

Abstract

A technique is presented that provides for a qualitative and quantitative assessment of the risk of failing to achieve EMC compliance when making minor hardware design changes (component or PCB layout) on a product that has already had a successful compliance test performed. The EMC design risk assessment (EDRA) technique uses a simple summation of risk scheme to allow design changes to be gauged and the requirement for re-testing to be implied from the total risk value. The technique allows a product supplier to make a quantified technical assessment of the impact of design changes on the compliance status and hence decide if a retest is required or can be avoided. The supplier may make the decision to not implement all of the suggested design changes in order to avoid retest costs and the EDRA may be used to determine which changes are not economically feasible