60GHz CMOS divide-by-5 injection-locked frequency divider with an open-stub-loaded floating-source injector

Ming-Wei Li, Hsin-Chih Kuo, Tzuen-Hsi Huang, H. Chuang
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引用次数: 8

Abstract

A new injector topology is adopted for the design of a 60-GHz CMOS divide-by-5 injection-locked frequency divider (ILFD). The topology is based on a distributed-element harmonic termination by an open-stub structure connected to the floating source end of the differential injection pair. With this topology together with an N-MOS cross-coupled oscillator core, the supply voltage and power consumption of the divider can be greatly reduced. A test circuit is implemented in a 90-nm CMOS process. With the added λ/4 open stub, the simulated frequency locking range of the designed ILFD with the distributed-element harmonic termination scheme has been greatly extended over 70%. The measured power consumption is 3.75 mW at a supply voltage of 0.6 V and the locking range is 4.1 GHz. A good figure of merit (FOM) of 69.4 is achieved.
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60GHz CMOS除以5注入锁定分频器,带有开桩加载的浮动源注入器
采用一种新的注入器拓扑结构设计了一种60 ghz CMOS / 5注入锁定分频器(ILFD)。该拓扑结构基于分布式单元谐波终端,该终端由连接到差分注入副的浮动源端的开根结构构成。这种拓扑结构加上N-MOS交叉耦合振荡器核心,可以大大降低分频器的供电电压和功耗。在90纳米CMOS工艺中实现了测试电路。随着λ/4开路短段的加入,所设计的分布式元谐波端接ILFD的模拟频率锁定范围大大扩展到70%以上。在0.6 V电源电压下,测量功耗为3.75 mW,锁定范围为4.1 GHz。获得了69.4的优异值(FOM)。
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